Method for electroplating a substrate
First Claim
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1. A method for electroplating a substrate, the method comprising:
- applying a voltage switchable dielectric (VSD) material onto a target region of a device, said VSD material comprising;
a binder;
high aspect ratio (HAR) particles that are conductive or semi-conductive and dispersed as nanoscale particles within the binder; and
conductor and/or semiconductor particles other than said HAR particles;
said conductor and/or semiconductor particles being distributed in the binder;
wherein HAR particles and said conductor and/or semiconductor particles are combined to provide said composition with a characteristic of being (i) dielectric in absence of a voltage that exceeds a characteristic voltage level, and (ii) conductive with application of said voltage exceeding said characteristic voltage level;
forming a pattern using the VSD material;
applying the voltage that exceeds the characteristic voltage level so that the VSD material is conductive;
while applying the voltage, exposing the target region of the device to an electrolytic medium;
and wherein said characteristic voltage level exceeds about 14 volts per mil across a gap formed by a thickness of the VSD material.
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Abstract
One or more embodiments provide for a device that utilizes voltage switchable dielectric material having semi-conductive or conductive materials that have a relatively high aspect ratio for purpose of enhancing mechanical and electrical characteristics of the VSD material on the device.
247 Citations
1 Claim
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1. A method for electroplating a substrate, the method comprising:
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applying a voltage switchable dielectric (VSD) material onto a target region of a device, said VSD material comprising; a binder; high aspect ratio (HAR) particles that are conductive or semi-conductive and dispersed as nanoscale particles within the binder; and conductor and/or semiconductor particles other than said HAR particles; said conductor and/or semiconductor particles being distributed in the binder; wherein HAR particles and said conductor and/or semiconductor particles are combined to provide said composition with a characteristic of being (i) dielectric in absence of a voltage that exceeds a characteristic voltage level, and (ii) conductive with application of said voltage exceeding said characteristic voltage level; forming a pattern using the VSD material; applying the voltage that exceeds the characteristic voltage level so that the VSD material is conductive; while applying the voltage, exposing the target region of the device to an electrolytic medium; and wherein said characteristic voltage level exceeds about 14 volts per mil across a gap formed by a thickness of the VSD material.
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Specification