Method for manufacturing thin film integrated circuit, and element substrate

• US 7,968,386 B2
• Filed: 11/06/2009
• Issued: 06/28/2011
• Est. Priority Date: 02/06/2004
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Dairiki, Koji
• Primary Examiner(s): Smith; Matthew S
• Assistant Examiner(s): FAN, SU JYA
• Application Number:
  US12/613,650
• Publication Number:
  US 20100059748A1
• Time in Patent Office: 599 Days
• Field of Search: 438/149, 438151-152, 438/155, 438/689, 438/704, 438/706, 438/745, 257/347, 257/E27.001, 257/E21.085, 257/E21.533
• US Class Current: 438/155
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07758 arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02425 Conductive materials, e.g. metallic silicides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 21/02675 using laser beams
• CPC Class Codes: H01L 21/02678 Beam shaping, e.g. using a mask
• CPC Class Codes: H01L 21/02683 Continuous wave laser beam
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/02691 Scanning of a beam
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. In view of the above described object, one feature of the invention is to provide the steps of forming a separation layer over an insulating substrate and forming a thin film integrated circuit having a semiconductor film as an active region over the separation layer, wherein the thin film integrated circuit is not separated. There is less limitation on the shape of a mother substrate in the case of using the insulating substrate, when compared with the case of taking a chip out of a circular silicon wafer. Accordingly, reduction in cost of an IC chip can be achieved.

Claims

1. A method for manufacturing a thin film integrated circuit, comprising the steps of:

forming a separation layer over an insulating substrate;

forming at least two thin film integrated circuits over the separation layer;

forming a groove between the two thin film integrated circuits to expose the separation layer;

attaching an antenna substrate provided with an opening and an antenna over the two thin film integrated circuits; and

separating the insulating substrate by introducing an etchant into the opening and removing the separation layer,

wherein the two thin film integrated circuits are integrated by the antenna substrate.

2. The method for manufacturing a thin film integrated circuit according to claim 1, further comprising the steps of:

attaching the two thin film integrated circuits to a flexible substrate.

3. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein each of the two thin film integrated circuits comprises a thin film transistor and an insulating film containing nitrogen provided over and under the thin film transistor.

4. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the etchant is a gas or a liquid including halide typified by CIF₃.

5. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the insulating substrate is a glass substrate, a quartz substrate, or a substrate made of a synthetic resin such as plastic or acrylic.

6. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein a mounting position of each of the two thin film integrated circuits X satisfies (½

)·

D−

30 μ

m<

X<

(½

)·

D+30 μ

m when a thickness of a mount article is denoted by D.

7. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the antenna is attached to the two thin film integrated circuits by an anisotropic conductor, an ultrasonic adhesive, or an ultraviolet curing resin.

8. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the antenna is formed by a method selected from the group consisting of a droplet discharge method, a sputtering method, a printing method, a plating method, a photolithography method, an evaporation method using a metal mask, and a combination thereof.

9. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the separation layer is an amorphous semiconductor, a semi-amorphous semiconductor, a microcrystalline semiconductor, or a crystalline semiconductor.

10. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the two thin film integrated circuits have a thickness of 0.3 μ

m to 3 μ

m.

11. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein the two thin film integrated circuits are 5 mm squared or less.

12. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein each of the two thin film integrated circuits includes a semiconductor film having a hydrogen concentration of 1×

10¹⁹ /cm³ to 5×

10²⁰ /cm³.

13. The method for manufacturing a thin film integrated circuit according to claim 12,

wherein the semiconductor film has a thickness of 0.2 μ

m or less.

14. The method for manufacturing a thin film integrated circuit according to claim 12,

wherein the semiconductor film comprises a source region, a drain region, and a channel formation region and,

wherein the source region, the drain region, and the channel formation region are formed to be perpendicular to a bending direction of a mount article.

15. The method for manufacturing a thin film integrated circuit according to claim 1,

wherein a thin film integrated circuit is formed by cutting the two thin film integrated circuits by a dicing, a scribing, or a laser cutting method.