Apparatus for sensing an output current in a communications device

• US 7,973,567 B2
• Filed: 07/07/2010
• Issued: 07/05/2011
• Est. Priority Date: 01/17/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Vorenkamp, Pieter
• Primary Examiner(s): Hiltunen; Thomas J
• Application Number:
  US12/831,446
• Publication Number:
  US 20100271005A1
• Time in Patent Office: 363 Days
• Field of Search: 323/303, 327/51
• US Class Current: 327/51
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: H04B 3/44 Arrangements for feeding power to a repeater along the transmission line
• CPC Class Codes: H04L 12/10 Current supply arrangements
• CPC Class Codes: H04L 12/40045 Details regarding the feeding of energy to the node from the bus
• CPC Class Codes: H04L 25/02 Details ; arrangements for supplying electrical power along data transmission lines systems for transmitting signals via power distribution lines H04B3/54
• CPC Class Codes: Y10S 370/91 Carrier sense multiple access, e.g. ethernet, 10base-t

Abstract

Power over Ethernet (PoE) communication systems provide power and data communications over the same communications link, where a power source device (PSE) provides DC power (for example, 48 volts DC) to a powered device (PD). The DC power is transmitted simultaneously over the same communications medium with the high speed data from one node to the other node. The PSE typically includes a controller that controls the DC power provided to the PD at the second node of the communications link. The PSE controller measures the voltage, current, and temperature of the outgoing and incoming DC supply lines to characterize the power requirements of the PD. The PSE controller includes a resistorless switch to measure the current. The resistorless switch includes a sense transistor and a current mirror to allowing the PSE controller to calculate the current based upon a replica current.

Claims

1. An apparatus for sensing current, comprising:

a main transistor configured to have a first drain to source voltage applied between its respective drain and its respective source and a first gate to source voltage applied between its respective gate and its respective source;

a sense transistor configured to have a second drain to source voltage applied between its respective drain and its respective source and a second gate to source voltage applied between its respective gate and its respective source,

a first comparator configured to cause the second drain to source voltage to be a replica of the first drain to source voltage; and

a second comparator configured to cause the second gate to source voltage to be a replica of the first gate to source voltage.

2. The apparatus of claim 1, wherein the first comparator is further configured to compare the first drain to source voltage and the second drain to source voltage.

3. The apparatus of claim 2, wherein the first comparator is configured to provide an output that causes the second drain to source voltage to replicate the first drain to source voltage.

4. The apparatus of claim 2, wherein the second comparator is further configured to compare the first gate to source voltage and the second gate to source voltage.

5. The apparatus of claim 4, wherein the second comparator is configured to provide an output that causes the second gate to source voltage to replicate the first gate to source voltage.

6. The apparatus of claim 1, wherein a size of the sense transistor is substantially smaller than a size of the main transistor.

7. The apparatus of claim 1, wherein a current flowing through the main transistor is a scaled replica of a current flowing through the sense transistor.

8. The apparatus of claim 7, wherein the current flowing through the main transistor is provided by a powered device coupled to a communications medium.

9. The apparatus of claim 1, further comprising:

a current mirror configured to provide a first current to the sense transistor and a second current in response to the second drain to source voltage and the second gate to source voltage being applied to the sense transistor, the first current being a replica of a current flowing through the main transistor, the second current being a replica of the first current; and

a sense resistor configured to convert the second current to a sense voltage.

10. The apparatus of claim 9, further comprising:

a voltage measurement system configured to measure the sense voltage to determine the current flowing through the main transistor.

11. An apparatus for sensing current, comprising:

a main transistor configured to provide a first current from its respective source to its respective drain in response to a first drain to source bias and a first gate to source bias;

a sense transistor configured to provide a second current from its respective source to its respective drain in response to a second drain to source bias and a second gate to source bias;

a first comparator configured to cause the second drain to source bias to be a replica of the first drain to source bias; and

a second comparator configured to cause the second gate to source bias to be a replica of the first gate to source bias.

12. The apparatus of claim 11, wherein the second drain to source bias is a replica of the first drain to source bias and the second gate to source bias is a replica of the first gate to source bias.

13. The apparatus of claim 11, wherein the first comparator is further configured to compare the first drain to source bias and the second drain to source bias.

14. The apparatus of claim 13, wherein the first comparator is configured to provide an output that causes the second drain to source bias to replicate the first drain to source bias.

15. The apparatus of claim 13, wherein the second comparator is further configured to compare the first gate to source bias and the second gate to source bias.

16. The apparatus of claim 15, wherein the second comparator is configured to provide an output that causes the second gate to source bias to replicate the first gate to source bias.

17. The apparatus of claim 11, wherein a size of the sense transistor is substantially smaller than a size of the main transistor.

18. The apparatus of claim 11, wherein the first current is provided by a powered device coupled to a communications medium.

19. The apparatus of claim 11, further comprising:

a current mirror configured to provide the second current to the sense transistor and a third current in response to the second drain to source bias and the second gate to source bias being applied to the sense transistor, the third current being a replica of the second current; and

a sense resistor configured to convert the third current to a sense voltage.

20. The apparatus of claim 19, further comprising:

a voltage measurement system configured to measure the sense voltage to determine the current flowing through the main transistor.