Dynamic allocation of message buffers
First Claim
1. A method for allocating memory that is associated with a CAN (controller area network) controller, the method comprising:
- receiving a data frame comprising an identifier (ID) and data;
dynamically allocating a message buffer (MB) within the memory for queuing the data frame, wherein the MB is allocated only upon receiving the data and the MB is de-allocated once the data is retrieved from the memory;
generating a pointer that points to the MB, where the pointer is accessed via a static location in the memory, andproviding a host access to the MB in one or more of a polling mode of operation and an interrupt driven mode of operation.
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Abstract
A method for allocating memory that is associated with a CAN (controller area network) controller, comprises receiving a data frame comprising an identifier (ID) and data; dynamically allocating a message buffer (MB) within the memory for queuing the data frame; and generating a pointer that points to the MB, where the pointer is accessed via a static location in the memory. A corresponding host interface for the CAN controller can be implemented in IC circuitry, is configured to be coupled to a host CPU and a CAN bus interface, and includes a memory allocation unit for dynamic memory allocation and a memory access controller, coupled to the memory allocation unit and the memory, that is configured to control access to the memory to facilitate transmitting and receiving a multiplicity of data frames over a CAN bus.
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Citations
20 Claims
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1. A method for allocating memory that is associated with a CAN (controller area network) controller, the method comprising:
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receiving a data frame comprising an identifier (ID) and data; dynamically allocating a message buffer (MB) within the memory for queuing the data frame, wherein the MB is allocated only upon receiving the data and the MB is de-allocated once the data is retrieved from the memory; generating a pointer that points to the MB, where the pointer is accessed via a static location in the memory, and providing a host access to the MB in one or more of a polling mode of operation and an interrupt driven mode of operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A CAN (controller area network) controller comprising:
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a memory allocation unit implemented as an integrated circuit and configured; to dynamically allocate a message buffer (MB) within a memory, the MB for queuing, upon reception, a data frame comprising an identifier (ID) and data, with MB allocation occurring after reception of the data and MB de-allocation occurring once the data is retrieved from the memory; and to provide a pointer that points to the MB, where the pointer is accessed via a static location in the memory; a memory access controller coupled to the memory allocation unit and the memory and configured to control access to the memory to facilitate transmitting and receiving a multiplicity of data frames over a CAN bus; and a CPU interface coupled to a host, wherein the host is provided access to the MB in one or more of a polling mode of operation and an interrupt driven mode of operation. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A host interface for a controller area network (CAN) controller, the host interface implemented in integrated circuit (IC) circuitry and configured to be coupled to a host and to a CAN Bus interface, the host interface comprising:
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a memory allocation unit for dynamically allocating message buffers (MBs) for queuing data frames in one or more linked list of MBs, wherein a particular MB is allocated only upon receipt of valid data, the particular MB is used for queuing the valid data, and the particular MB is de-allocated once the valid data is retrieved, and wherein for each linked list of MBs a first pointer to a first MB is stored is a predetermined memory location, a second pointer to a second MB is stored in the first MB, and subsequent pointers to subsequent MBs are stored in the respective immediately preceding MBs; a receive engine coupled to the CAN bus interface for receiving data frames from the CAN bus and storing received data frames in the one or more linked list of MBs of type receive; a transmit engine coupled to the CAN bus interface for transmitting transmit data frames stored in the one or more linked list of MBs of type transmit; and a memory access controller for controlling access by the receive engine, transmit engine, and the host to the one or more linked list of MBs, wherein the host is provided access to the one or more linked list of MBs in one or more of a polling mode of operation and an interrupt driven mode of operation. - View Dependent Claims (19, 20)
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Specification