Reading memory cells using multiple thresholds

• US 7,975,192 B2
• Filed: 10/30/2007
• Issued: 07/05/2011
• Est. Priority Date: 10/30/2006
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Anobit Technologies, Ltd. (Apple Inc.)
• Inventors: Shalvi, Ofir, Sokolov, Dotan, Sommer, Naftali
• Primary Examiner(s): Gaffin; Jeffrey A
• Assistant Examiner(s): Gandhi; Dipakkumar
• Application Number:
  US11/995,814
• Publication Number:
  US 20100165730A1
• Time in Patent Office: 1,344 Days
• Field of Search: None
• US Class Current: 714/719
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS
• CPC Class Codes: G11C 8/20 Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Abstract

A method for operating a memory (28) includes storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells (32) of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells. The stored data is read by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells. At least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values. Soft metrics are computed responsively to the multiple comparison results. The ECC is decoded using the soft metrics, so as to extract the data stored in the analog memory cells.

Claims

1. A method for operating a memory, comprising:

storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells;

reading the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values;

computing soft metrics responsively to the multiple comparison results;

decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells; and

making an initial attempt to decode the ECC using an initial set of the read thresholds, such that no more than one of the read thresholds in the initial set is positioned between each pair of the nominal values that are adjacent to one another, and comparing the analog output values to the multiple read thresholds upon a failure of the initial attempt.

2. The method according to claim 1, wherein each of the analog memory cells stores one or more bits of the data, and wherein each of the soft metrics corresponds to one of the bits.

3. The method according to claim 2, each of at least some of the analog memory cells stores two or more bits of the data, wherein reading the data comprises, for each of the at least some of the analog memory cells, reading the two or more data bits in respective two or more decoding stages, and wherein computing the soft metrics comprises modifying a soft metric of a first bit read in a first decoding stage responsively to a value of a second bit read in a second decoding stage that precedes the first decoding stage.

4. The method according to claim 3, wherein modifying the soft metric comprises conditionally inverting the soft metric of the first bit depending on the value of the second bit.

5. The method according to claim 1, wherein each comparison result has one of first and second possible values, and wherein computing the soft metrics comprises determining respective first and second counts of the comparison results having the first and second possible values, and computing the soft metrics based on the first and second counts.

6. The method according to claim 1, and comprising, upon failing to decode the ECC, adding one or more additional read thresholds to the multiple read thresholds, re-computing the soft metrics responsively to the additional read thresholds, and decoding the ECC using the re-computed soft metrics.

7. The method according to claim 6, wherein adding the additional threshold comprises progressively increasing a number of the read thresholds until a predetermined condition is met.

8. The method according to claim 1, wherein computing the soft metrics comprises normalizing the soft metrics so as not to depend on a number of the read thresholds.

9. The method according to claim 1, wherein performing the multiple read operations comprises positioning the multiple read thresholds at non-uniform intervals with respect to one another.

10. A method for operating a memory, comprising:

storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells;

reading the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values;

computing soft metrics responsively to the multiple comparison results; and

decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells,

wherein reading the data from a first group of the analog memory cells further comprises estimating interference caused to the first group by a second group of the analog memory cells and canceling the estimated interference,

and wherein canceling the estimated interference comprises modifying the soft metrics associated with the first group responsively to the estimated interference.

11. A method for operating a memory, comprising:

storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing respective analog input values selected from a set of nominal values to the analog memory cells;

reading the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values;

computing soft metrics responsively to the multiple comparison results; and

decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells,

wherein reading the data from a first group of the analog memory cells further comprises estimating interference caused to the first group by a second group of the analog memory cells and canceling the estimated interference,

and comprising, upon failing to decode the ECC in the first group, selecting whether to perform one of;

re-reading the data in the second group, so as to re-estimate and cancel the interference;

re-estimating the interference by reading the data in a third group of the memory cells; and

adding one or more additional read thresholds and re-reading the data in the first group using the additional read thresholds.

12. A data storage apparatus, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in the analog memory cells by writing respective input analog values selected from a set of nominal values to the analog memory cells, to read the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values, to compute soft metrics responsively to the multiple comparison results, and to decode the ECC using the soft metrics, so as to extract the data stored in the analog memory cells

wherein the MSP is coupled to make an initial attempt to decode the ECC using an initial set of the read thresholds, such that no more than one of the read thresholds in the initial set is positioned between each pair of the nominal values that are adjacent to one another, and to compare the analog output values to the multiple read thresholds upon failure of the initial attempt.

13. The apparatus according to claim 12, wherein each of the analog memory cells stores one or more bits of the data, and wherein each of the soft metrics corresponds to one of the bits.

14. The apparatus according to claim 13, wherein each of at least some of the analog memory cells stores two or more bits of the data, and wherein the MSP is coupled to read the two or more data bits in respective two or more decoding stages, and to modify a soft metric of a first bit read in a first decoding stage responsively to a value of a second bit read in a second decoding stage that precedes the first decoding stage.

15. The apparatus according to claim 14, wherein the MSP is coupled to conditionally invert the soft metric of the first bit depending on the value of the second bit.

16. The apparatus according to claim 12, wherein each comparison result has one of first and second possible values, and wherein the MSP is coupled to determine respective first and second counts of the comparison results having the first and second possible values, and to compute the soft metrics based on the first and second counts.

17. The apparatus according to claim 12, wherein, upon failing to decode the ECC, the MSP is coupled to add one or more additional read thresholds to the multiple read thresholds, to re-compute the soft metrics responsively to the additional read thresholds and to decode the ECC using the re-computed soft metrics.

18. The apparatus according to claim 17, wherein the MSP is coupled to progressively increase a number of the read thresholds until a predetermined condition is met.

19. The apparatus according to claim 12, wherein the MSP is coupled to normalize the soft metrics so as not to depend on a number of the read thresholds.

20. The apparatus according to claim 12, wherein the MSP is coupled to position the multiple read thresholds at non-uniform intervals with respect to one another.

21. A data storage apparatus, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in the analog memory cells by writing respective input analog values selected from a set of nominal values to the analog memory cells, to read the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values, to compute soft metrics responsively to the multiple comparison results, and to decode the ECC using the soft metrics, so as to extract the data stored in the analog memory cells,

wherein the MSP is coupled to estimate interference caused to a first group of the analog memory cells by a second group of the analog memory cells, and to cancel the estimated interference,

and wherein the MSP is coupled to modify the soft metrics associated with the first group responsively to the estimated interference.

22. A data storage apparatus, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a memory signal processor (MSP), which is connected to the interface and is coupled to store data, which is encoded with an Error Correction Code (ECC), in the analog memory cells by writing respective input analog values selected from a set of nominal values to the analog memory cells, to read the stored data by performing multiple read operations that compare analog output values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values, to compute soft metrics responsively to the multiple comparison results, and to decode the ECC using the soft metrics, so as to extract the data stored in the analog memory cells,

wherein the MSP is coupled to estimate interference caused to a first group of the analog memory cells by a second group of the analog memory cells, and to cancel the estimated interference,

and wherein, upon failing to decode the ECC in the first group, the MSP is coupled to select whether to perform one of;

re-reading the data in the second group, so as to re-estimate and cancel the interference;

re-estimating the interference by reading the data in a third group of the memory cells; and

adding one or more additional read thresholds and re-reading the data in the first group using the additional read thresholds.

23. A data storage apparatus, comprising:

a memory device, comprising;

a plurality of analog memory cells, which are configured to store data, which is encoded with an Error Correction Code (ECC) and written to the analog memory cells as respective analog input values selected from a set of nominal values; and

reading circuitry, which is coupled to read the stored data by performing multiple read operations that compare output analog values of the analog memory cells to different, respective read thresholds so as to produce multiple comparison results for each of the analog memory cells, wherein at least two of the read thresholds are positioned between a pair of the nominal values that are adjacent to one another in the set of the nominal values, to compute soft metrics responsively to the multiple comparison results, and to output the computed soft metrics; and

a Memory Signal Processor (MSP) device, which is connected to the memory device and is coupled to accept the soft metrics computed by the reading circuitry, and to decode the ECC using the soft metrics

wherein the MSP is coupled to make an initial attempt to decode the ECC using an initial set of the read thresholds, such that no more than one of the read thresholds in the initial set is positioned between each pair of the nominal values that are adjacent to one another, and to cause the reading circuitry to compare the analog output values to the multiple read thresholds upon failure of the initial attempt.

24. A method for operating a memory, comprising:

storing data, which is encoded with an Error Correction Code (ECC), in analog memory cells of the memory by writing respective analog input values to the analog memory cells;

reading the stored data by comparing analog output values of the analog memory cells to a set of read thresholds, so as to produce multiple comparison results for each of the analog memory cells;

computing soft metrics responsively to the multiple comparison results;

decoding the ECC using the soft metrics, so as to extract the data stored in the analog memory cells; and

upon a failure to successfully extract the data, extending the set of the read thresholds by adding one or more new read thresholds to the set, updating the multiple comparison results based on the extended set of the read thresholds, re-computing the soft metrics and re-decoding the ECC, so as to extract the data.

25. The method according to claim 24, wherein extending the set of the read thresholds comprises selecting the one or more new read thresholds responsively to the output analog values of the analog memory cells.

26. The method according to claim 25, wherein selecting the one or more new read thresholds comprises determining at least one property selected from a group of properties consisting of a number of the new read thresholds and values of the new read thresholds.