Architecture for RFID tag reader/writer

• US 7,979,034 B2
• Filed: 02/18/2005
• Issued: 07/12/2011
• Est. Priority Date: 02/18/2005
• Status: Expired due to Fees

• Current Assignee: Cyrips Pte Limited, Agency For Science Technology and Research (Government of Singapore)
• Original Assignee: Cyrips Pte Limited, Agency For Science Technology and Research (Government of Singapore)
• Inventors: Ajjikuttira, Aruna B., Khannur, Pradeep B., Zheng, Jia Jun, Wong, Sheng Jau
• Primary Examiner(s): Lu; Zhiyu
• Application Number:
  US11/884,619
• Publication Number:
  US 20080252421A1
• Time in Patent Office: 2,335 Days
• Field of Search: 455/311, 455315-325
• US Class Current: 455/73
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer

Abstract

An RFID transceiver (200) includes a common frequency source (250), a receiving channel (230) and a transmitting channel (240). The common frequency source (250) is configured to provide a predefined intermediate frequency signal f_IF, and a predefined carrier frequency signal f_c. The RFID receiving channel (230) includes an upconverting mixer (232) having a first input coupled to receive the predefined intermediate frequency signal f_IF, a second input coupled to receive the predefined carrier frequency signal f_c, and an output, the upconverting mixer (232) operable to produce an upconverted signal at a frequency defined by f_c±f_IF. The RFID receiving channel (230) further includes an image rejection downconverting mixer (234) having a first input coupled to receive an RFID signal having a carrier frequency substantially at the predefined carrier frequency f_c, a second input coupled to receive the upconverted signal, and an output, the image rejection downconverting mixer (234) operable to produce an output a downconverted signal at substantially the predefined intermediate frequency f_IF. The RFID transmitting channel (240) includes a modulator (244) operable to modulate modulation data onto the predefined carrier frequency signal f_c.

Claims

1. A radio frequency identification (RFID) transceiver, comprising:

a common frequency source configured to provide (i) a predefined intermediate frequency signal f_IF, and (ii) a predefined carrier frequency signal f_C;

an RFID receiving channel, comprising;

a single sideband upconverting mixer having a first input coupled to receive the predefined intermediate frequency signal f_IF, a second input coupled to receive the predefined carrier frequency signal f_C, and an output, the single sideband upconverting mixer operable to produce an upconverted signal at a frequency defined by f_c±

f_IF;

an image rejection downconverting mixer having a first input coupled to receive an RFID signal having a carrier frequency substantially at the predefined carrier frequency f_C, a second input coupled to receive the upconverted signal, and an output, the image rejection mixer operable to produce a downconverted signal at substantially the predefined intermediate frequency f_IF; and

an RFID transmitting channel comprising a modulator operable to modulate modulation data onto the predefined carrier frequency signal f_C.

2. The RFID transceiver of claim 1, wherein the single sideband upconverting mixer, the image rejection downconvertering mixer, and the modulator are monolithically formed on an integrated circuit.

3. The RFID transceiver of claim 1, further comprising a buffer amplifier coupled between the common frequency source and the modulator.

4. The RFID transceiver of claim 1, wherein the modulator comprises a switch having a first input coupled to receive the predefined carrier frequency signal f_C, a second input coupled to receive modulation data, the switch operable to switch between a plurality of states responsive to the supplied modulation signal.

5. The RFID transceiver of claim 1, wherein the receiving channel further comprises a demodulator having an input coupled to output of the image rejection downconverting mixer and an output for providing baseband data modulated on the received RFID signal.

6. The RFID transceiver of claim 5, wherein the demodulator consists of a demodulator from the group consisting of a frequency shift-keyed demodulator, an amplitude shift-keyed demodulator, an on-off keyed demodulator, or a phase shift-keyed demodulator.

7. The RFID transceiver of claim 1, wherein the common frequency source comprises a phase locked loop, further comprising:

a phase-frequency detector having a first input coupled to receive a reference frequency signal f_REF or frequency divided version thereof, a second input to receive an error signal, the phase-frequency detector operable to output a VCO control voltage;

a loop filter having an input coupled to receive the VCO control voltage signal and an output to provide a filtered VCO control voltage signal; and

a voltage-controlled oscillator having an input coupled to receive the filtered VCO control voltage signal, the voltage controlled oscillator operable to produce the carrier frequency signal.

8. The RFID transceiver of claim 7, wherein no additional phase locked loops are implemented in either the receiving channel or the transmitting channel.

9. The RFID transceiver of claim 7, wherein the predetermined intermediate frequency f_IF is substantially the reference frequency f_REF or a frequency divided version thereof.

10. The RFID transceiver of claim 1, wherein the modulator comprises (i) a phase-locked loop in direct-modulation for generating an FSK modulated signal, or (ii) a sigma-delta modulator based fractional-N PLL synthesizer to produce an FSK modulated signal, wherein the modulation data supplied to the PLL synthesizer produces an FSK modulated carrier signal.

11. The RFID transceiver of claim 7, wherein the single sideband upconverting mixer, the image rejection downconverting mixer, the modulator, the voltage-controlled oscillator, and the PLL are monolithically formed on an integrated circuit.

21. The RFID transceiver of claim 1, wherein the modulator comprises (i) a phase-locked loop in direct-modulation for generating an FSK modulated signal, or (ii) a sigma-delta modulator based fractional-N PLL synthesizer to produce an FSK modulated signal, wherein the modulation data supplied to the PLL synthesizer produces an FSK modulated carrier signal.

12. An radio frequency identification (RFID) transceiver, comprising:

a single phase locked loop configured to provide (i) a predefined intermediate frequency signal f_IF, and (ii) a predefined carrier frequency signal f_C;

an RFID receiving channel, comprising;

a single sideband upconverting mixer having a first input coupled to receive the predefined intermediate frequency signal f_IF, a second input coupled to receive the predefined carrier frequency signal f_C, and an output, the single sideband upconverting mixer operable to produce an upconverted signal at a frequency defined by f_C±

f_IF.

an image rejection downconverting mixer having a first input coupled to receive an RFID signal having a carrier frequency substantially at the predefined carrier frequency f_C, a second input coupled to receive the upconverted signal, and an output, the second image rejection mixer operable to produce an output a downconverted signal at substantially the predefined intermediate frequency f_IF; and

an RFID transmitting channel comprising a modulator operable to modulate the modulation data onto the predefined carrier frequency signal f_C.

13. The RFID transceiver of claim 12, wherein the single phase locked loop comprises:

a phase-frequency detector having a first input coupled to receive a reference frequency signal f_REF or frequency divided version thereof, a second input to receive an error signal, the phase-frequency detector operable to output a VCO control voltage;

a loop filter having an input coupled to receive the VCO control voltage signal and an output to provide a filtered VCO control voltage signal; and

a voltage-controlled oscillator having an input coupled to receive the filtered VCO control voltage signal, the voltage controlled oscillator operable to produce the carrier frequency signal; and

a buffer amplifier having an input coupled to the output of the voltage-controlled oscillator and an output.

14. The RFID transceiver of claim 13, wherein the receiving channel further comprises a demodulator having an input coupled to the output of the image rejection downconverting mixer and an output, the demodulator comprising a demodulator selected from the group consisting of a frequency shift-keyed demodulator, an amplitude shift-keyed demodulator, an on-off keyed demodulator, and a phase shift-keyed demodulator.

15. The RFID transceiver of claim 13, wherein the predetermined intermediate frequency f_IF is substantially the reference frequency f_REF or a frequency divided version thereof.

16. The RFID transceiver of claim 13, wherein the modulator comprises a switch having a first input coupled to receive the predefined carrier frequency signal f_C, a second input coupled to receive modulation data, the switch operable to switch between a plurality of states responsive to the supplied modulation signal.

17. The RFID transceiver of claim 13, wherein the modulator comprises the voltage controlled oscillator coupled to receive modulation data, and to produce an FSK modulated carrier signal responsive to the supplied modulation data.

19. The RFID transceiver of claim 17, wherein the receiving channel further comprises a demodulator having an input coupled to the output of the image rejection downconverting mixer and an output, the demodulator comprising a demodulator selected from the group consisting of a frequency shift-keyed demodulator, an amplitude shift-keyed demodulator, an on-off keyed demodulator, and a phase shift-keyed demodulator.

20. The RFID transceiver of claim 17, wherein the single phase locked loop comprises:

a phase-frequency detector having a first input coupled to receive a reference frequency signal f_REF or frequency divided version thereof, a second input to receive an error signal, the phase-frequency detector operable to output a VCO control voltage;

a loop filter having an input coupled to receive the VCO control voltage signal and an output to provide a filtered VCO control voltage signal; and

a voltage-controlled oscillator having an input coupled to receive the filtered VCO control voltage signal, the voltage controlled oscillator operable to produce the carrier frequency signal; and

a buffer amplifier having an input coupled to the output of the voltage-controlled oscillator and an output.

18. An radio frequency identification (RFID) transceiver, comprising:

an antenna operable to receive an RFID signal;

a circulator having a port 2 coupled to the antenna for transmitting/receiving the RFID signal, a port 3 for receiving a modulated RFID signal, and a port 1;

a front-end amplifier having an input coupled to the circulator port 3 and an output;

a single phase locked loop configured to provide (i) a predefined intermediate frequency signal f_IF, and (ii) a predefined carrier frequency signal f_C;

an RFID receiving channel having an input coupled to the input of the front-end amplifier and an output, the RFID receiving channel comprising;

a single sideband upconverting mixer having a first input coupled to receive the predefined intermediate frequency signal f_IF, a second input coupled to receive the predefined carrier frequency signal f_C, and an output, the single sideband upconverting mixer operable to produce an upconverted signal at a frequency defined by f_C±

f_IF;

an image rejection downconverting mixer having a first input coupled to receive an RFID signal having a carrier frequency substantially at the predefined carrier frequency f_C, a second input coupled to receive the upconverted signal, and an output, the image rejection mixer operable to produce an output a downconverted signal at substantially the predefined intermediate frequency f_IF; and

an RFID transmitting channel having an output coupled to port 1 of the circulator, the RFID transmitting channel comprising;

a modulator operable to modulate the modulation data onto the predefined carrier frequency signal f_C; and

a power amplifier having an input coupled to the output of the modulator and an output coupled to the port 1 of the circulator.