Layered low-pass filter capable of producing a plurality of attenuation poles

• US 7,982,557 B2
• Filed: 01/08/2009
• Issued: 07/19/2011
• Est. Priority Date: 01/29/2008
• Status: Active Grant

• Current Assignee: TDK Corporation
• Original Assignee: TDK Corporation
• Inventors: Sakisaka, Yasunori, Kagaya, Yukitoshi
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): Glenn; Kimberly E
• Application Number:
  US12/318,786
• Publication Number:
  US 20090189714A1
• Time in Patent Office: 922 Days
• Field of Search: 333/177, 333/184, 333/185, 333/202, 333/204, 333/205
• US Class Current: 333/185
• CPC Class Codes: H03H 2001/0085 Multilayer, e.g. LTCC, HTCC, green sheets inside PCB filters H05K
• CPC Class Codes: H03H 7/0115 comprising only inductors and capacitors H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence
• CPC Class Codes: H03H 7/1725 Element to ground being common to different shunt paths, i.e. Y-structure
• CPC Class Codes: H03H 7/1758 Series LC in shunt or branch path H03H7/1791 takes precedence
• CPC Class Codes: H03H 7/1766 Parallel LC in series path H03H7/1783 takes precedence

Abstract

A layered low-pass filter includes: a first inductor and a second inductor that are connected in series and are located between an input terminal and an output terminal; a first capacitor connected in parallel to the first inductor; a second capacitor connected in parallel to the second inductor; and third to fifth capacitors and third to fifth inductors. The output of the first inductor and the input of the second inductor are connected to the ground via the third capacitor and the third inductor connected in series. The input of the first inductor is connected to the ground via the fourth capacitor and the fourth inductor connected in series. The output of the second inductor is connected to the ground via the fifth capacitor and the fifth inductor 8 connected in series.

Claims

1. A layered low-pass filter comprising:

a layered substrate including a plurality of dielectric layers stacked;

an input terminal and an output terminal each disposed on a periphery of the layered substrate;

a first inductor and a second inductor each formed using at least one conductor layer provided within the layered substrate, the first and second inductors being connected in series to each other and, in terms of circuit configuration, located between the input terminal and the output terminal;

first to fifth capacitors and third to fifth inductors provided within the layered substrate; and

first to third grounding terminals each disposed on the periphery of the layered substrate and connected to a ground, wherein;

in terms of circuit configuration, the first inductor is located closer to the input terminal than is the second inductor;

each of the first and second inductors has an input for receiving signals and an output for outputting signals;

the output of the first inductor is connected to the input of the second inductor;

the first capacitor is connected in parallel to the first inductor;

the second capacitor is connected in parallel to the second inductor;

the third capacitor has a first end connected to the output of the first inductor and to the input of the second inductor;

the fourth capacitor has a first end connected to the input of the first inductor;

the fifth capacitor has a first end connected to the output of the second inductor;

the third inductor connects a second end of the third capacitor to the ground;

the fourth inductor connects a second end of the fourth capacitor to the ground;

the fifth inductor connects a second end of the fifth capacitor to the ground;

each of the third to fifth capacitors includes a capacitor-forming conductor layer and a ground-side conductor layer that are opposed to each other;

the third inductor connects the ground-side conductor layer of the third capacitor to the first grounding terminal;

the fourth inductor connects the ground-side conductor layer of the fourth capacitor to the second grounding terminal;

the fifth inductor connects the ground-side conductor layer of the fifth capacitor to the third grounding terminal;

the ground-side conductor layers of the third to fifth capacitors are disposed on a surface of one of the dielectric layers; and

the third to fifth inductors are disposed on a surface of another one of the dielectric layers.