Substrate inductive devices and methods

• US 7,982,572 B2
• Filed: 07/15/2009
• Issued: 07/19/2011
• Est. Priority Date: 07/17/2008
• Status: Active Grant

• Current Assignee: Pulse Electronics Incorporated (Yageo Corporation)
• Original Assignee: Pulse Engineering Incorporated (Yageo Corporation)
• Inventors: Lindner, Alan, Schaffer, Christopher P., Gutierrez, Aurelio J.
• Primary Examiner(s): MAI, ANH T
• Application Number:
  US12/503,682
• Publication Number:
  US 20100013589A1
• Time in Patent Office: 734 Days
• Field of Search: 336/200, 336/223, 336/232
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 17/062 Toroidal core with turns of coil around it
• CPC Class Codes: H01F 27/40 Structural association with built-in electric component, e.g. fuse
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H05K 1/165 incorporating printed inductors
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor

Abstract

Methods and Apparatus for providing a low-cost and high-precision inductive device. In one embodiment, the inductive device comprises a plurality of vias having extended ends which replace windings disposed around a magnetically permeable core. In another embodiment, the inductive device comprises a wired center core as well as a plurality of vias having extended ends which act as windings disposed around a magnetically permeable core. In a second aspect of the invention, a method of manufacturing the aforementioned inductive devices as well as the wired core centers is disclosed.

Claims

1. A wire-less inductive device, comprising:

at least three substrates comprising a top substrate, a bottom substrate and one or more middle substrates, at least one of said at least three substrates comprised of an exterior surface which is at least partly copper plated, with said at least one substrate having one or more windings formed thereon;

a plurality of extended conductors, at least a portion of said plurality of extended conductors extending from said exterior copper plated surface and substantially through said substrate;

a magnetically permeable core, said core disposed at least partly between two or more of said at least three substrates; and

a second magnetically permeable core, said second magnetically permeable core in combination with said at least three substrates, an incorporated electronic component and said magnetically permeable core, form a complete filter circuit.

2. The wire-less inductive device of claim 1, wherein the one or more windings and said plurality of extended conductors are physically separated from said magnetically permeable core.

3. The wire-less inductive device of claim 1, wherein said incorporated electronic component comprises a capacitive structure disposed on at least one of said plurality of substrates, said capacitive structure comprising a plurality of capacitive plates, said plurality of capacitive plates placed substantially parallel to one another in a layered configuration.

4. An inductive device, comprising:

a pair of substrates, each comprised of an exterior surface which is at least partly copper plated, each of said substrates having one or more windings formed thereon;

wherein at least one of said plurality of substrates further comprises an incorporated electronic component;

a plurality of conductors, at least a portion of said plurality of conductors extending from said exterior copper plated surface and substantially through said substrate;

one or more magnetically permeable core(s), said core(s) disposed at least partly between said pair of substrates; and

a second magnetically permeable core, said second magnetically permeable core in combination with said substrates, said incorporated electronic component and other ones of said one or more magnetically permeable core(s), forming a complete filter circuit;

wherein said pair of substrates are spaced apart a first distance, said one or more windings in combination with said one or more magnetically permeable core(s) and said conductors forming said inductive device.

5. The inductive device of claim 4, wherein the one or more windings and said plurality of conductors are physically separated from said one or more magnetically permeable core(s).

6. The inductive device of claim 4, further comprising an insulative coating to improve electrical isolation between the one or more cores and adjacent ones of said conductors.

7. The inductive device of claim 4, wherein said pair of substrates each comprise through hole vias.

8. The inductive device of claim 4, wherein said incorporated electronic component is modeled into at least one of said pair of substrates.

9. The inductive device of claim 4, wherein said incorporated electronic component comprises a discrete electronic component mounted on a discrete mounting location on at least one of said pair of substrates.

10. The inductive device of claim 9, wherein said one or more magnetically permeable core(s) comprise non-toroidal magnetically permeable cores.

11. The inductive device of claim 4, wherein said one or more magnetically permeable core(s) comprise non-toroidal magnetically permeable cores.

12. The inductive device of claim 4, further comprising a vapor phase deposited insulative coating to improve electrical isolation between the one or more cores and adjacent ones of said conductors.

13. A partially wired inductive device, comprising:

a plurality of substrates, each of said substrates having one or more conductive pathways formed thereon;

a wired core center comprising a molded bundle of magnet wires; and

a magnetically permeable core, said core disposed at least partly between said plurality of printable substrates.

14. The partially wired inductive device of claim 13, further comprising a plurality of outer winding vias disposed in each of said plurality of substrates.

15. The partially wired inductive device of claim 14, wherein each of said plurality of substrates further comprises a plurality of extended vias disposed thereon, at least a portion of said plurality of extended vias interconnecting said plurality of substrates.

16. The partially wired inductive device of claim 14, wherein said plurality of outer winding vias are in electrical communication with said wired core center via said one or more conductive pathways formed on said plurality of substrates.

17. An electronics assembly, comprising:

an integrated inductive device comprising;

a plurality of substrates, at least two of said substrates each comprised of an exterior surface which is at least partly copper plated, said at least two substrates having one or more windings formed thereon;

wherein at least one of said plurality of substrates further comprises an electronic component receiving pad;

an electronic component disposed on said electronic component receiving pad;

a plurality of conductors, at least a portion of said plurality of conductors extending from said exterior copper plated surface and substantially through said respective substrate; and

a plurality of magnetically permeable cores disposed at least partly between said at least two substrates;

wherein said at least two substrates are spaced apart a first distance, with said one or more windings in combination with said plurality of magnetically permeable cores, said electronic component and said conductors forming said integrated inductive device.

18. The electronics assembly of claim 17, wherein said electronics assembly comprises a modular jack.

19. The electronics assembly of claim 18, wherein said integrated inductive device comprises a Gigabit Ethernet circuit.

20. The electronics assembly of claim 19, wherein said at least two substrates each comprise through hole vias.

21. The electronics assembly of claim 20, wherein at least a portion of said plurality of magnetically permeable cores comprise non-toroidal magnetically permeable cores.

22. The electronics assembly of claim 21, further comprising a vapor phase deposited insulative coating to improve electrical isolation between the plurality of cores and adjacent ones of said conductors.