Deformable micromirror device
First Claim
1. A micromirror device for applying a digital image data to display an image comprising:
- a plurality of pixel elements arranged in a form of an array and grouped into B subsets each including pixel elements configured as Ms columns and Ns rows represented by Ms (COLUMNs)×
Ns (ROWs) wherein-Ms, Ns and B are positive integers;
each of said pixel elements has a mirror, and at least one memory cell to pulse width modulate (PWM) an incident light;
the memory cell has a transistor of an input gate capacity Ct[F];
each memory cell is connected by a ROW line having a wiring resistance R[106 ], and a wiring capacity C[F]; and
wherein the parameters represented byMs, Ns, B, Ct, R, C, and a number of colors represented by C0 have a relationship of R*(Ct+C)<
(1.63*10−
5*B)/[Co*Ms*Ns*(Ms+1)], when a gray scale display of 10 bits or more for each color is presented with a color sequential display of C0 colors.
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Accused Products
Abstract
A micromirror device, which makes an image display with digital image data, comprises pixel elements each of which makes pulse width modulation for incident light depending on the deflection state of light and which are arranged in the form of an array. The array of the pixel elements is composed of B subsets each including pixel elements of Ms (COLUMNs)×Ns (ROWs) (Ms, Ns, and B are natural numbers). Each of the pixel elements has a mirror, and at least one memory cell. The memory cell has a transistor of an input gate capacity Ct[F]. Each memory cell is connected by a ROW line having a wiring resistance R[Ω], and a wiring capacity C[F]. When a gray scale display of 10 [bits] or more for each color is made with a color sequential display of C0 colors, Ms, Ns, B, Ct, R, C, and C0 have a relationship of R*(Ct+C)<(1.63*10−5*B)/[Co*Ms*Ns*(Ms+1)].
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Citations
24 Claims
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1. A micromirror device for applying a digital image data to display an image comprising:
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a plurality of pixel elements arranged in a form of an array and grouped into B subsets each including pixel elements configured as Ms columns and Ns rows represented by Ms (COLUMNs)×
Ns (ROWs) wherein-Ms, Ns and B are positive integers;each of said pixel elements has a mirror, and at least one memory cell to pulse width modulate (PWM) an incident light; the memory cell has a transistor of an input gate capacity Ct[F]; each memory cell is connected by a ROW line having a wiring resistance R[106 ], and a wiring capacity C[F]; and
wherein the parameters represented byMs, Ns, B, Ct, R, C, and a number of colors represented by C0 have a relationship of R*(Ct+C)<
(1.63*10−
5*B)/[Co*Ms*Ns*(Ms+1)], when a gray scale display of 10 bits or more for each color is presented with a color sequential display of C0 colors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A micromirror device for applying a digital image data to display an image, comprising:
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a plurality of pixel elements arranged in a form of an array and grouped into B subsets each including pixel elements configured as Ms columns and Ns rows represented by Ms (COLUMNs)×
Ns (ROWs) wherein-Ms, Ns and B are positive integers);each of said pixel elements has a mirror, and at least one memory cell to pulse width modulate (PWM) an incident light; the memory cell has a transistor of an input gate capacity Ct[F]; each memory cell is connected by a ROW line having a wiring resistance R[Ω
], and a wiring capacity C[F]; and
wherein the parameters represented byMs, Ns, B, Ct, R, C, and a number of colors represented by C0, and a number of gray scales represented by a bit number Gs have a relationship of R*(Ct+C)<
B*[60*Co*(2Gs−
1)*Ms*Ns*(Ms+1)]−
1, when a gray scale display of Gs [bits] for each color is presented with a color sequential display of C0 colors. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A micromirror device for applying a digital image data to display an image comprising:
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a plurality of pixel elements arranged in a form of an array and grouped into B subsets each including pixel elements configured as Ms columns and Ns rows represented by Ms (COLUMNs)×
Ns (ROWs) wherein-Ms, Ns and B are positive integers;each of said pixel elements has a mirror, and at least one memory cell to pulse width modulate (PWM) an incident light; the memory cell has a transistor of an input gate capacity Ct[F]; the memory cell has a transistor of an input gate capacity Ct[F]; each memory cell is connected by a ROW line having a wiring resistance R[Ω
], and a wiring capacity C[F]; and
wherein the parameters represented byMs, Ns, Ct, R, and C have a relationship of τ
>
[R*(Ct+C)*Ms*(Ms+1)*Ns], for a minimum display duration τ
(sec) of each of said pixel elements for the digital image data. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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Specification