Method for patching a read-only memory and a data processing system comprising a means of patching the read-only memory based on patch contexts

• US 7,984,432 B2
• Filed: 05/30/2006
• Issued: 07/19/2011
• Est. Priority Date: 05/30/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Edlund, Mattias
• Primary Examiner(s): Khatri; Anil
• Application Number:
  US11/442,808
• Publication Number:
  US 20070294599A1
• Time in Patent Office: 1,876 Days
• Field of Search: 717168-174, 709203-204
• US Class Current: 717/168
• CPC Class Codes: G06F 8/66 of program code stored in read-only memory [ROM]

Abstract

A method for patching a read-only memory (ROM) includes providing multiple patch contexts in a patch contexts memory, with the ROM providing information for a data processing system. Each patch context defines a different set of patches, with each patch comprising a patch address and corresponding patch data. The patch contexts are activated one at a time. Each time the information is patched according to the currently activated patch context.

Claims

1. A method for patching a read-only memory, wherein the read-only memory provides information for a data processing system, the method comprising:

providing multiple patch contexts in a patch contexts memory, wherein each patch context defines a different set of patches, and wherein each patch comprises a patch address and corresponding patch data;

activating the patch contexts one at a time, wherein at each time the information in a read-only memory that provides information for a data processing system is patched according to the currently activated patch context;

wherein activating a patch context comprises loading a patch context from the patch contexts memory into patch hardware configured to patch the read-only memory according to the loaded patch context, wherein the patch hardware is limited with respect to a number of patches to load therein; and

wherein before switching between two threads, wherein a first thread is deactivated and a second thread is activated, information about a currently activated patch context is saved in the patch contexts memory, and the saved patch context is restored a next time the first thread is reactivated.

2. A data processing system comprising:

a read-only memory configured to store and provide information for the data processing system;

a patch contexts memory configured to store and provide multiple patch contexts, wherein each patch context comprises a different set of patches, and wherein each patch comprises a patch address and corresponding patch data; and

a means for patching the read-only memory, configured to activate the patch contexts one at a time, wherein each time the information being patched according to the currently activated patch context;

wherein the means of patching the read-only memory comprises patch hardware, wherein the patch hardware is configured to load a patch context from the patch contexts memory, and wherein the patch hardware is limited with respect to a number of patches to load, and wherein the patching is performed according to a loaded patch context within the patch hardware, and

wherein before switching between two threads, wherein a first thread is deactivated and a second thread is activated, information about a currently activated patch context is saved in the patch contexts memory by the patching means, and the saved patch context is restored a next time the first thread is reactivated.

3. A method for patching a read-only memory, comprising:

providing a patch contexts memory in which multiple patch contexts are stored, wherein a patch context identifies both an address location in the ROM and

corresponding patch data, the patch data differing from initial data stored in the address location in the ROM;

activating the patch context by loading the patch context from the patch contexts memory into a patch vector register, wherein the patch vector register is limited with respect to a number of patch contexts to load therein;

after the patch context has been activated, receiving a data request that specifies the address location within the ROM in which the initial data was stored; and

responding to the data request by returning the corresponding patch data from the patch vector register rather than returning the initial data from the address location in the ROM,

wherein before switching between two threads, wherein a first thread is deactivated and a second thread is activated, information about a currently activated patch context is saved in the patch contexts memory, and the saved patch context is restored a next time the first thread is reactivated.