High voltage low current surface-emitting LED

• US 7,985,970 B2
• Filed: 04/06/2009
• Issued: 07/26/2011
• Est. Priority Date: 04/06/2009
• Status: Active Grant

• Current Assignee: Creeled Incorporated
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Ibbetson, James, Heikman, Sten
• Primary Examiner(s): LEBENTRITT, MICHAEL
• Application Number:
  US12/418,816
• Publication Number:
  US 20100155746A1
• Time in Patent Office: 841 Days
• Field of Search: 257 79- 99, 257/184, 257/E27.121, 257 33001- 5, 257/56
• US Class Current: 257/77
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs.

Claims

1. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount, wherein said sub-LEDs are formed from a single junction LED;

an insulator layer between said submount and said sub-LEDs; and

electrically conductive and electrically insulating features serially interconnecting said sub-LEDs such that an electrical signal applied to said serially interconnected sub-LEDs along said electrically conductive features spreads to said serially interconnected sub-LEDs, wherein said electrically conductive features comprises a plurality of connector traces serially interconnecting said sub-LEDs.

2. The LED chip of claim 1, wherein the voltage necessary to drive said sub-LEDs is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

3. The LED chip of claim 1, wherein said sub-LEDs are formed from a single junction LED by removing portions of said single junction LED.

4. The LED chip of claim 3, wherein said sub-LEDs are formed from a single junction LED by isolation implants.

5. The LED chip of claim 3, wherein the active area utilization ratio is greater than 50%.

6. The LED chip of claim 3, wherein the active area utilization ratio of said single junction LED active region is greater than 75%.

7. The LED chip of claim 1, wherein said sub-LEDs are flip-chip mounted on said submount.

8. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount;

a plurality of bottom contacts, each of which is between one of said sub-LEDs and said submount;

connector traces serially interconnecting said sub-LEDs; and

insulating features to insulate portions of said sub-LEDs from said connector traces.

9. The LED chip of claim 8, wherein said the drive voltage is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

10. The LED chip of claim 8, further comprising an insulating layer between said sub-LEDs and said submount.