Dielectric interface for group III-V semiconductor device

• US 7,989,280 B2
• Filed: 12/18/2008
• Issued: 08/02/2011
• Est. Priority Date: 11/30/2005
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Blackwell, James M., Chau, Robert S., Kavalieros, Jack T., Doczy, Mark L., Brask, Justin K., Metz, Matthew V., Datta, Suman
• Primary Examiner(s): Sarkar; Asok K
• Assistant Examiner(s): Slutsker; Julia
• Application Number:
  US12/338,839
• Publication Number:
  US 20090095984A1
• Time in Patent Office: 957 Days
• Field of Search: 438/197, 438/216, 438/287, 257/189, 257/E21.398, 257/E21.386, 257/E21.451
• US Class Current: 438/197
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02241 III-V semiconductor
• CPC Class Codes: H01L 21/0228 deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• CPC Class Codes: H01L 21/28008 Making conductor-insulator-semiconductor electrodes
• CPC Class Codes: H01L 21/314 Inorganic layers H01L21/3105, H01L21/32 take precedence
• CPC Class Codes: H01L 21/3141 Deposition using atomic layer deposition techniques [ALD]
• CPC Class Codes: H01L 21/31616 Deposition of Al2O3
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66462 with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
• CPC Class Codes: H01L 29/7784 with delta or planar doped donor layer H01L29/7785 takes precedence

Abstract

A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.

Claims

1. A method for fabricating a semiconductor device comprising:

growing a first region of a Group III-V compound;

growing a confinement region on the first region;

forming a disulfide bridge or diselenide bridge region on the confinement region;

forming a dielectric region on the disulfide bridge or diselenide bridge region, wherein one atom of the disulfide bridge or diselenide bridge is bonded directly to the dielectric region but is not bonded directly to the confinement region, and wherein the other atom of the disulfide bridge or diselenide bridge is bonded directly to the confinement region but is not bonded directly to the dielectric region; and

forming a metal gate on the dielectric region.

2. The method of claim 1, including removing a native oxide from the confinement region prior to forming the disulfide bridge or diselenide bridge region.

3. The method of claim 2, wherein the native oxide is removed by an etchant selected from the group consisting of citric acid, HCl and HF.

4. The method of claim 1, wherein the dielectric region comprises a high-k dielectric.

5. The method of claim 4, wherein the high-k dielectric comprises HfO₂.

6. The method of claim 1, wherein the disulfide bridge or diselenide bridge region is formed by using a precursor selected from the group consisting of a di-organic di-sulfide and a di-organic di-selenide.

7. The method of claim 1, wherein the first region comprises InSb or InP.

8. A semiconductor device comprising:

a compound of Group III-V elements in a first region;

a confinement region having a wider band gap than the first region;

a disulfide bridge or diselenide bridge region disposed on the confinement region;

a dielectric region disposed on the disulfide bridge or diselenide bridge, wherein one atom of the disulfide bridge or diselenide bridge is bonded directly to the dielectric region but is not bonded directly to the confinement region, and wherein the other atom of the disulfide bridge or diselenide bridge is bonded directly to the confinement region but is not bonded directly to the dielectric region; and

a metal gate disposed on the dielectric region.

9. The semiconductor device of claim 8, wherein the dielectric region comprises a high-k dielectric.

10. The semiconductor device of claim 9, wherein the high-k dielectric comprises HfO₂.

11. The semiconductor device of claim 8, wherein the first region comprises InSb or InP.