High dynamic range cascaded integration pixel cell and method of operation

• US 7,990,449 B2
• Filed: 09/24/2008
• Issued: 08/02/2011
• Est. Priority Date: 08/29/2002
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Fossum, Eric R.
• Primary Examiner(s): Aggarwal; Yogesh
• Application Number:
  US12/236,987
• Publication Number:
  US 20090021627A1
• Time in Patent Office: 1,042 Days
• Field of Search: 348/294, 348300-302, 348/308, 250/208.1, 257290-292
• US Class Current: 348/294
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/59 by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
• CPC Class Codes: H04N 3/155 Control of the image-sensor operation, e.g. image processing within the image-sensor

Abstract

A cascaded imaging storage system for a pixel is disclosed for improving intrascene dynamic range. Charges accumulated in a first capacitor spill over into a second capacitor when a charge storage capacity of the first capacitor is exceeded. A third capacitor may also be provided such that charges accumulated by said second capacitor spill over into the third capacitor when the charge storage capacity of the second capacitor is exceeded.

Claims

1. A semiconductor device comprising:

a photo-conversion node;

a first charge storage node configured to store charge generated by the photo-conversion node;

a second charge storage node configured to store charge generated by the photo-conversion node when the charge exceeds a limit, wherein the limit is the charge storage capacity of the first charge storage node;

a third charge storage node configured to store charge generated by the photo-conversion node when the charge exceeds the combined storage capacity of the first and second charge storage nodes;

a transistor coupled between the first and second charge storage nodes and configured to transfer charge to the second charge storage node when the charge exceeds the limit; and

a second transistor coupled between the second and third charge storage nodes and configured to transfer charge to the third charge storage node when the charge exceeds the combined storage capacity of the first and second charge storage nodes.