Liquid crystal display having a modified electrode array

• US 7,990,507 B2
• Filed: 11/23/2009
• Issued: 08/02/2011
• Est. Priority Date: 11/03/1997
• Status: Expired due to Fees

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Na, Byoung-Sun, Chang, Jong-Woong, Lee, Kye-Hun, Lee, Hyun-Sik, Shim, Jung-Uk, Yuh, Jin-Tae, Kim, Dong-Gyu, Song, Jang-Kun
• Primary Examiner(s): Dudek; James A
• Application Number:
  US12/623,505
• Publication Number:
  US 20100103359A1
• Time in Patent Office: 617 Days
• Field of Search: 349/141
• US Class Current: 349/141
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/134372 for fringe field switching [FFS] where the common electrode is not patterned
• CPC Class Codes: G02F 1/134381 Hybrid switching mode, i.e. for applying an electric field with components parallel and orthogonal to the substrates

Abstract

A liquid crystal display having electrodes on a single substrate. A transparent planar electrode elongated in the transverse direction is formed on the inner surface of a substrate, and an insulating film is deposited thereon. A plurality of linear electrodes, which are elongated in the longitudinal direction and either transparent or opaque, are formed on the insulating film. Potential difference between the planar and the linear electrodes generated by applying voltages to the electrodes yields an electric field. The electric field is symmetrical with respect to the longitudinal central line of the linear electrodes, and has parabolic or semi-elliptical lines of force having a center on a boundary line between the planar and the linear electrodes. The line of force on the planar and the linear electrodes and on the boundary line between the planar and the linear electrodes has the vertical and the horizontal components, and the liquid crystal molecules are re-arranged to have a twist angle and a tilt angle. The polarization of the incident light varies due to the rearrangement of the liquid crystal molecules.

Claims

1. A liquid crystal display, comprising:

a first substrate;

a second substrate;

a liquid crystal layer disposed between the first and second substrates and comprising a plurality of liquid crystal molecules;

a planar electrode disposed on the first substrate; and

at least two linear electrodes disposed on the first substrate and overlapping the planar electrode in a pixel region,

wherein electric fields are generated by applying a voltage between the linear electrode and the planar electrode, and an average horizontal component of the electric fields at a boundary of the linear electrode is larger than an average horizontal component of the electric fields at a center portion between two linear electrodes.

2. The liquid crystal display of claim 1, wherein a width of linear electrode is no more than a distance between the linear electrodes.

3. The liquid crystal display of claim 2, wherein the width of linear electrode is from 4μ

m to 6μ

m, and the distance between the linear electrodes is from 15μ

m to 19μ

m.

4. The liquid crystal display of claim 3, further comprising a black matrix is disposed on the first substrate.

5. The liquid crystal display of claim 4, further comprising a color filter is disposed on the first substrate.

6. The liquid crystal display of claim 5, wherein the color filter comprises a red, green and blue color filter, and an area of the blue color filter is larger than an area of green or red color filter.

7. The liquid crystal display of claim 6, wherein further comprising:

a gate line disposed on the first substrate;

a data line insulated from the gate line and disposed on the first substrate, and

wherein the linear electrode is substantially parallel to the data line.

8. The liquid crystal display of claim 7, further comprising a semiconductor pattern is disposed below a portion of the data line.

9. The liquid crystal display of claim 8, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

10. The liquid crystal display of claim 9, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

11. The liquid crystal display of claim 10, wherein the linear electrode and the planar electrode are transparent.

12. The liquid crystal display of claim 1, further comprising a black matrix is disposed on the first substrate.

13. The liquid crystal display of claim 12, further comprising a color filter is disposed on the first substrate.

14. The liquid crystal display of claim 13, wherein further comprising:

a gate line disposed on the first substrate;

a data line insulated from the gate line and disposed on the first substrate, and

wherein the linear electrode is substantially parallel to the data line.

15. The liquid crystal display of claim 14, further comprising a semiconductor pattern is disposed below a portion of the data line.

16. The liquid crystal display of claim 15, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

17. The liquid crystal display of claim 16, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

18. The liquid crystal display of claim 17, wherein the linear electrode and the planar electrode are transparent.

19. The liquid crystal display of claim 1, further comprising a color filter is disposed on the first substrate.

20. The liquid crystal display of claim 19, wherein further comprising:

a gate line disposed on the first substrate;

a data line insulated from the gate line and disposed on the first substrate, and

wherein the linear electrode is substantially parallel to the data line.

21. The liquid crystal display of claim 20, further comprising a semiconductor pattern is disposed below a portion of the data line.

22. The liquid crystal display of claim 21, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

23. The liquid crystal display of claim 22, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

24. The liquid crystal display of claim 22, wherein the linear electrode and the planar electrode are transparent.

25. The liquid crystal display of claim 1, wherein further comprising:

a gate line disposed on the first substrate;

a data line insulated from the gate line and disposed on the first substrate, and

wherein the linear electrode is substantially parallel to the data line.

26. The liquid crystal display of claim 25, further comprising a semiconductor pattern is disposed below a portion of the data line.

27. The liquid crystal display of claim 26, wherein a portion portion of the linear electrode or planar electrode overlaps with the data line.

28. The liquid crystal display of claim 27, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

29. The liquid crystal display of claim 28, wherein the linear electrode and the planar electrode are transparent.

30. The liquid crystal display of claim 1, further comprising a semiconductor pattern is disposed below a portion of the data line.

31. The liquid crystal display of claim 30, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

32. The liquid crystal display of claim 31, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

33. The liquid crystal display of claim 32, wherein the linear electrode and the planar electrode are transparent.

34. The liquid crystal display of claim 1, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

35. The liquid crystal display of claim 34, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

36. The liquid crystal display of claim 35, wherein the linear electrode and the planar electrode are transparent.

37. The liquid crystal display of claim 1, further comprising:

a thin film transistor disposed on the first substrate; and

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

38. The liquid crystal display of claim 37, wherein the linear electrode and the planar electrode are transparent.

39. The liquid crystal display of claim 1, wherein the linear electrode and the planar electrode are transparent.

40. The liquid crystal display of claim 1, wherein a cell gap of the liquid crystal display is from 4μ

m to 5μ

m.

41. The liquid crystal display of claim 1, wherein the liquid liquid crystal layer comprises a chiral dopant of 0.001 to 3.0wt%.

42. The liquid crystal display of claim 1, wherein the liquid crystal layer comprises a nematic liquid crystal having a positive dielectric anisotropy.

43. The liquid crystal display of claim 1, wherein the liquid crystal layer comprises a nematic liquid crystal having a negative dielectric anisotropy.

48. The liquid crystal display of claim 11, wherein a thickness of the data line is from 100 to 200nm.

44. A liquid crystal display including a plurality of pixel regions, the liquid crystal display comprising:

a first substrate comprising a gate line;

a second substrate;

a liquid crystal layer disposed between the first and second substrates and comprising a plurality of liquid crystal molecules;

a planar electrode disposed on the first substrate;

at least two linear electrode disposed on the first substrate and overlapping with the planar electrode in the pixel region; and

a connecting line connected to the two linear electrode, wherein the planar electrode forms a continuous plane between the linear type electrodes.

45. The liquid crystal display of claim 44, wherein the connecting line is substantially parallel to the gate line.

46. The liquid crystal display of claim 45, further comprising a data line insulated from the gate line, and

wherein the connecting line is intersected with the data line.

47. The liquid crystal display of claim 46, wherein the linear electrode is substantially parallel to the data line.

49. The liquid crystal display of claim 47, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

50. The liquid crystal display of claim 47, wherein the connecting line is disposed on a same layer as the gate line.

51. The liquid crystal display of claim 50, wherein the planar electrode has at least one slit, and the slit is disposed between the two linear electrodes.

52. The liquid crystal display of claim 51, wherein a width of linear electrode is no more than a distance between the linear electrodes.

53. The liquid crystal display of claim 52, wherein the width of linear electrode is from 4μ

m to 6μ

m, and the distance between the linear electrodes is from 15μ

m to 19μ

m.

54. The liquid crystal display of claim 53, further comprising a black matrix is disposed on the first substrate.

55. The liquid crystal display of claim 54, further comprising a color filter is disposed on the first substrate.

56. The liquid crystal display of claim 55, wherein the color filter comprises a red, green and blue color filter, and an area of the blue color filter is larger than an area of green or red color filter.

57. The liquid crystal display of claim 56, further comprising a semiconductor pattern is disposed below a portion of the data line.

58. The liquid crystal display of claim 57, further comprising a thin film transistor is connected to one of the planar electrode and the two linear electrodes.

59. The liquid crystal display of claim 58, further comprising:

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

60. The liquid crystal display of claim 59, further comprising a thin film transistor comprising a gate electrode, a source electrode and a drain electrode disposed in the pixel region,

wherein the planar electrode is directly contacted with the drain electrode.

61. The liquid crystal display of claim 60, wherein the linear electrode and the planar electrode are transparent.

62. A liquid crystal display including a plurality of pixel regions, the liquid crystal display comprising:

a first substrate comprising a gate line and a data line;

a thin film transistor connected to the gate line and the data line;

a second substrate facing the first substrate;

a liquid crystal layer disposed between the first and second substrates and comprising a plurality of liquid crystal molecules;

at least two linear electrodes disposed on the first substrate; and

a planar electrode disposed on the two linear electrode and overlapping with the two linear electrodes in the pixel region.

63. The liquid crystal display of claim 62, wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes.

64. The liquid crystal display of claim 63, further comprising:

a passivation layer disposed on the thin film transistor;

wherein the passivation layer has a contact hole disposing on the thin film transistor; and

wherein the thin film transistor is connected to one of the planar electrode and the two linear electrodes through the contact hole.

65. The liquid crystal display of claim 64, wherein the planar electrode has at least one slit, wherein the slit is disposed between the two linear electrodes.

66. The liquid crystal display of claim 65, further comprising a black matrix is disposed on the first substrate.

67. The liquid crystal display of claim 66, further comprising a color filter is disposed on the first substrate.

68. The liquid crystal display of claim 67, wherein the color filter comprises a red, green and blue color filter, and an area of the blue color filter is larger than an area of green or red color filter.

69. The liquid crystal display of claim 67, wherein the linear electrode is substantially parallel to the data line.

70. The liquid crystal display of claim 69, further comprising a semiconductor pattern is disposed below a portion of the data line.

71. The liquid crystal display of claim 70, further comprising a connecting line is disposed substantially parallel to the gate line.

72. The liquid crystal display of claim 71, wherein the connecting line is disposed on a same layer as gate line.

73. The liquid crystal display of claim 71, wherein a thickness of the connecting line is from 50 to 100nm.

74. The liquid crystal display of claim 73, wherein a portion of the linear electrode or planar electrode overlaps with the data line.

75. The liquid crystal display of claim 74, wherein the linear electrode and the planar electrode are transparent.