Method and system for platform independent fault management

• US 7,992,044 B2
• Filed: 12/05/2008
• Issued: 08/02/2011
• Est. Priority Date: 12/05/2008
• Status: Active Grant

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Oracle America, Inc. (Oracle Corporation)
• Inventors: Soydan, Tarik Pertev, Davenport, Scott W., Tsien, Louis Yonlo
• Primary Examiner(s): Iqbal; Nadeem
• Application Number:
  US12/329,146
• Publication Number:
  US 20100146342A1
• Time in Patent Office: 970 Days
• Field of Search: 714 25- 28, 714 31- 33, 714 37- 39, 714 48- 50
• US Class Current: 714/37
• CPC Class Codes: G06F 11/0706 the processing taking place on a specific hardware platform or in a specific software environment
• CPC Class Codes: G06F 11/0775 Content or structure details of the error report, e.g. specific table structure, specific error fields
• CPC Class Codes: G06F 11/079 Root cause analysis, i.e. error or fault diagnosis in a hardware test environment G06F11/22; in a software test environment G06F11/36

Abstract

A method for fault management. The method includes generating, in firmware of a computer system, a physical resource inventory (PRI) of a plurality of hardware components of the computer system, wherein the PRI defines a hierarchy of the hardware components. The method further includes traversing, by an enumerator executing in a fault manager, the PRI to generate a topology of the plurality of hardware components. The topology is used for fault management of the computer system.

Claims

1. A method for fault management, comprising:

generating, in firmware of a computer system, a physical resource inventory (PRI) of a plurality of hardware components of the computer system, wherein the PRI defines a hierarchy of the plurality of hardware components;

traversing, by an enumerator executing in a fault manager, the PRI to generate a topology of the plurality of hardware components, wherein the topology is used for fault management of the computer system;

receiving, by a diagnosis engine executing on an operating system of the computer system, an error report from the firmware;

identifying, by the diagnosis engine, an error class from the error report;

identifying a fault management resource identifier from the error report, wherein the fault management resource identifier explicitly identifies a location of a detector that detected the error with respect to a board comprising the detector; and

processing the error report using the error class and the fault management resource identifier.

2. The method of claim 1, wherein traversing the PRI comprises traversing any non-PCI express fabric nodes in the PRI before traversing a PCI express fabric in the PRI.

3. The method of claim 1, wherein the PRI comprises an identifier property, wherein the identifier property is unique among a plurality of PRI nodes corresponding to a same type of hardware component.

4. The method of claim 1, wherein a PRI node in the PRI comprises a serial number, a part number, a revision number, and a dash number when the PRI node corresponds to a hardware component of the plurality of hardware components that is a field replaceable unit.

5. The method of claim 4, wherein the PRI node further comprises a location string property.

6. The method of claim 1, wherein a PRI node of the PRI comprises a topology skip property to indicate that the PRI node is ignored in generating the topology.

7. The method of claim 1, wherein the error class is an error class for a correctable error, and wherein an error class specification comprises a threshold value and a duration of time value, wherein the threshold value specifies a threshold number of allowed correctable errors during a duration of time specified by the duration of time value.

8. The method of claim 7, wherein the threshold value and the duration of time value are provided by the firmware to override at least one default value in the diagnosis engine.

9. A computer system, comprising:

a plurality of hardware components;

firmware configured to;

generate a physical resource inventory (PRI) of the plurality of hardware components in the computer system, wherein the PRI defines a hierarchy of the plurality of hardware components;

detect an error; and

generate an error report,

wherein the error report identifies an error class of the error, and

wherein the error report conforms to an error class specification that is generic to a plurality of computer systems;

an enumerator executing on an operating system of the computer system and configured to;

traverse the PRI to generate a topology of the plurality of hardware components, wherein the topology is used for fault management of the computer system; and

a diagnosis engine executing in the operating system and configured to;

receive the error report from the firmware;

identify the error class from the error report;

identify a fault management resource identifier from the error report, wherein the fault management resource identifier explicitly identifies a location of a detector that detected the error with respect to a board comprising the detector; and

process the error report using the error class and the fault management resource identifier.

10. The computer system of claim 9, wherein traversing the PRI comprises traversing any non-PCI express fabric nodes in the PRI before traversing a PCI express fabric in the PRI.

11. The computer system of claim 9, wherein the PRI comprises an identifier property, wherein the identifier property is unique among a plurality of PRI nodes corresponding to a same type of hardware component.

12. The computer system of claim 9, wherein a PRI node in the PRI comprises a serial number, a part number, a revision number, and a dash number when the PRI node corresponds to a hardware component of the plurality of hardware components that is a field replaceable unit.

13. The computer system of claim 12, wherein the PRI node further comprises a location string property.

14. The computer system of claim 9, wherein a PRI node of the PRI comprises a topology skip property to indicate that the PRI node is ignored in generating the topology.

15. The computer system of claim 9, wherein the error class is an error class for a correctable error, and wherein the error class specification comprises a threshold value and a duration of time value, wherein the threshold value identifies a threshold number of allowed correctable errors during a duration of time specified by the duration of time value and, wherein the threshold value and the duration of time value are provided by the firmware to override at least one default value in the diagnosis engine.

16. A computer readable storage medium comprising instructions executable by a processor to:

traverse a physical resource inventory (PRI) to generate a topology of a plurality of hardware components in the computer system, wherein firmware of the computer system generates the PRI;

receive an error report from the firmware;

identify an error class from the error report;

identify a fault management resource identifier from the error report, wherein the fault management resource identifier explicitly identifies a location of a detector that detected the error; and

process the error report using the error class, the fault management resource identifier, and the topology to identify a fault of the computer system.

17. The computer readable storage medium of claim 16,

wherein the error class is an error class for a correctable error,

wherein an error class specification comprises a threshold value and a duration of time value,

wherein the threshold value specifies a threshold number of allowed correctable errors during a duration of time specified by the duration of time value, and

wherein the threshold value and the duration of time value are provided by the firmware to override at least one default value in the diagnosis engine.