Manufacturing method of semiconductor device including active layer of zinc oxide with controlled crystal lattice spacing

• US 7,993,964 B2
• Filed: 07/27/2009
• Issued: 08/09/2011
• Est. Priority Date: 06/02/2006
• Status: Expired due to Fees

• Current Assignee: Casio Computer Company Limited, Kochi Industrial Promotion Center
• Original Assignee: Casio Computer Company Limited, Kochi Industrial Promotion Center
• Inventors: Furuta, Hiroshi, Hirao, Takashi, Matsuda, Tokiyoshi, Hiramatsu, Takahiro, Furuta, Mamoru
• Primary Examiner(s): Thai; Luan C
• Application Number:
  US12/509,852
• Publication Number:
  US 20090286351A1
• Time in Patent Office: 743 Days
• Field of Search: 438/104, 438/149
• US Class Current: 438/104
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A manufacturing method of a semiconductor device includes forming an oxide semiconductor thin film layer of zinc oxide, wherein at least a portion of the oxide semiconductor thin film layer in an as-deposited state includes lattice planes having a preferred orientation along a direction perpendicular to the substrate and a lattice spacing d₀₀₂ of at least 2.619 Å.

Claims

1. A manufacturing method of a semiconductor device comprising:

providing a substrate;

depositing an oxide semiconductor thin film layer comprising zinc oxide on the substrate as a semiconductor layer of a thin film transistor;

depositing a layer comprising one of SiO_x, SiON, and SiN as a gate insulating film of the thin film transistor on the oxide semiconductor thin film layer;

wherein the oxide semiconductor thin film layer is deposited such that at least a predetermined portion of the oxide semiconductor thin film layer includes (002) lattice planes having a preferred orientation along a direction perpendicular to the substrate and a lattice spacing d₀₀₂ of at least 2.619 Å

.

2. The manufacturing method according to claim 1, wherein the entire oxide semiconductor thin film layer includes (002) lattice planes having the preferred orientation along the direction perpendicular to the substrate.

3. The manufacturing method according to claim 1, wherein a portion of the oxide semiconductor thin film layer which is in contact with the substrate corresponds to a channel of the thin film transistor.

4. The manufacturing method according to claim 1, wherein the lattice spacing d₀₀₂ of the (002) lattice planes of the oxide semiconductor thin film layer in at least the predetermined portion is at least 2.625 Å

.

5. The manufacturing method according to claim 1, wherein the predetermined portion is a portion corresponding to a channel of the thin film transistor.

6. The manufacturing method according to claim 1, wherein the oxide semiconductor thin film layer is deposited by magnetron sputtering.