Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon
First Claim
1. A method for fabricating a 3-D monolithic memory device, comprising:
- patterning a first silicon-oxynitride layer in a layered structure to provide a first patterned silicon-oxynitride layer, the layered structure includes a first amorphous carbon layer below the first silicon-oxynitride layer, and a first polycrystalline layer below the first amorphous carbon layer;
patterning the first amorphous carbon layer using the first patterned silicon-oxynitride layer to provide a first patterned amorphous carbon layer;
patterning the first polycrystalline layer using the first patterned amorphous carbon layer to provide a first plurality of pillars which comprise diodes in a first level of the 3-D monolithic memory device;
forming a second polycrystalline layer above the first plurality of pillars, a second amorphous carbon layer above the second polycrystalline layer, and a second silicon-oxynitride layer above the second amorphous carbon layer;
patterning the second silicon-oxynitride layer to provide a second patterned silicon-oxynitride layer;
patterning the second amorphous carbon layer using the second patterned silicon-oxynitride layer to provide a second patterned amorphous carbon layer; and
patterning the second polycrystalline layer using the second patterned amorphous carbon layer to provide a second plurality of pillars which comprise diodes in a second level of the 3-D monolithic memory device.
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Abstract
A method for fabricating a 3-D monolithic memory device. Silicon-oxynitride (SixOyNz) on amorphous carbon is used an effective, easily removable hard mask with high selectivity to silicon, oxide, and tungsten. A silicon-oxynitride layer is etched using a photoresist layer, and the resulting etched SixOyNz layer is used to etch an amorphous carbon layer. Silicon, oxide, and/or tungsten layers are etched using the amorphous carbon layer. In one implementation, conductive rails of the 3-D monolithic memory device are formed by etching an oxide layer such as silicon dioxide (SiO2) using the patterned amorphous carbon layer as a hard mask. Memory cell diodes are formed as pillars in polysilicon between the conductive rails by etching a polysilicon layer using another patterned amorphous carbon layer as a hard mask. Additional levels of conductive rails and memory cell diodes are formed similarly to build the 3-D monolithic memory device.
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Citations
9 Claims
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1. A method for fabricating a 3-D monolithic memory device, comprising:
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patterning a first silicon-oxynitride layer in a layered structure to provide a first patterned silicon-oxynitride layer, the layered structure includes a first amorphous carbon layer below the first silicon-oxynitride layer, and a first polycrystalline layer below the first amorphous carbon layer; patterning the first amorphous carbon layer using the first patterned silicon-oxynitride layer to provide a first patterned amorphous carbon layer; patterning the first polycrystalline layer using the first patterned amorphous carbon layer to provide a first plurality of pillars which comprise diodes in a first level of the 3-D monolithic memory device; forming a second polycrystalline layer above the first plurality of pillars, a second amorphous carbon layer above the second polycrystalline layer, and a second silicon-oxynitride layer above the second amorphous carbon layer; patterning the second silicon-oxynitride layer to provide a second patterned silicon-oxynitride layer; patterning the second amorphous carbon layer using the second patterned silicon-oxynitride layer to provide a second patterned amorphous carbon layer; and patterning the second polycrystalline layer using the second patterned amorphous carbon layer to provide a second plurality of pillars which comprise diodes in a second level of the 3-D monolithic memory device. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for fabricating a 3-D monolithic memory device, comprising:
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in a layered structure, in a first level of the 3-D monolithic memory device; transferring a first common pattern to a first silicon-oxynitride layer and a first amorphous carbon layer below the first silicon-oxynitride layer, to provide, together, first patterned silicon-oxynitride and amorphous carbon layers; patterning a first oxide layer below the first amorphous carbon layer using the first patterned silicon-oxynitride and amorphous carbon layers together to provide a first patterned oxide layer; forming a first set of conductive rails in the first patterned oxide layer; forming a polycrystalline layer above the first set of conductive rails; and patterning the polycrystalline layer to form a plurality of pillars which are electrically coupled to the first set of conductive rails, the first plurality of pillars comprise diodes; and above the first level of the 3-D monolithic memory device, in a second level of the 3-D monolithic memory device; transferring a second common pattern to a second silicon-oxynitride layer and a second amorphous carbon layer below the second silicon-oxynitride layer, to provide, together, second patterned silicon-oxynitride and amorphous carbon layers; and patterning a second oxide layer below the second amorphous carbon layer using the second patterned silicon-oxynitride and amorphous carbon layers together to provide a second patterned oxide layer. - View Dependent Claims (8)
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9. A method for fabricating a 3-D monolithic memory device, comprising:
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in a layered structure, in a first level of the 3-D monolithic memory device; transferring a common pattern to a first silicon-oxynitride layer and a first amorphous carbon layer below the first silicon-oxynitride layer, to provide, together, first patterned silicon-oxynitride and amorphous carbon layers; and patterning a first polycrystalline layer below the first amorphous carbon layer using the first patterned silicon-oxynitride and amorphous carbon layers together to provide a first patterned polycrystalline layer, the patterning of the first polycrystalline layer forms a first plurality of pillars which comprise diodes; and above the first level of the 3-D monolithic memory device, in a second level of the 3-D monolithic memory device; transferring the common pattern to a second silicon-oxynitride layer and a second amorphous carbon layer below the second silicon-oxynitride layer, to provide, together, second patterned silicon-oxynitride and amorphous carbon layers; and patterning a second polycrystalline layer below the second amorphous carbon layer using the second patterned silicon-oxynitride and amorphous carbon layers together to provide a second patterned polycrystalline layer, the patterning of the second polycrystalline layer forms a second plurality of pillars which comprise diodes.
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Specification