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Graphics system with embedded frame buffer having reconfigurable pixel formats

  • US 7,995,069 B2
  • Filed: 08/05/2009
  • Issued: 08/09/2011
  • Est. Priority Date: 08/23/2000
  • Status: Active Grant
First Claim
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1. A graphics processor configured to render at least one scene and/or image, comprising:

  • image processing circuitry; and

    an embedded frame buffer;

    wherein the embedded frame buffer is dynamically configurable, based on the at least one scene and/or image being geometry-limited or fill-limited, to receive data in at least two of the following formats;

    point sampled color and depth;

    super-sampled color and depth; and

    YUV.

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