Fly-by and ack-accelerated arbitration for broadcast packets

• US 7,995,606 B1
• Filed: 12/03/2003
• Issued: 08/09/2011
• Est. Priority Date: 12/03/2003
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Duckwall, William S., Hauck, Jerrold V., Kanhere, Prashant
• Primary Examiner(s): Yao; Kwang B
• Assistant Examiner(s): Cehic; Kenan
• Application Number:
  US10/728,185
• Time in Patent Office: 2,806 Days
• Field of Search: 370449-451, 370/257, 370/461, 370/462, 370/528, 710/119, 710/100, 710/107
• US Class Current: 370/462
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

A method for administering transmission of a first type of packets and a second type of packets over a serial bus. In one embodiment, the method comprises: if there is a packet of a second type to be sent, then concatenating the packet of the second type to a plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated packet of the second type; and if there is no packet of the second type to be sent, then concatenating a bogus ack packet to the plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated bogus ack packet.

Claims

1. A method for administering a serial bus, the bus facilitating communication between node devices connected to the bus and communicating over the bus in the form of packetized communication between said node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, the method comprising:

if there is a packet of the second type to be sent, then concatenating the packet of the second type to a plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated packet of the second type; and

if there is no packet of the second type to be sent, then concatenating a bogus ack packet to the plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated bogus ack packet.

2. The method of claim 1, wherein concatenating the packet of the second type is performed by link hardware.

3. The method of claim 1, wherein concatenation of the bogus ack packet is performed by link hardware.

4. The method of claim 1, wherein concatenation of the bogus ack packet is performed by PHY hardware.

5. The method of claim 4, wherein link hardware is unaware that the PHY hardware performs concatenation.

6. The method of claim 1, further comprising inspecting a first quadlet of a packet to determine a packet type.

7. The method of claim 6, wherein the first quadlet contains a transaction code, further comprising:

determining from the transaction code that the packet is a stream packet; and

determining that transmission is not occurring during an isochronous period.

8. A method for administering a serial bus, the bus facilitating communication between node devices connected to the bus and communicating over the bus in the form of packetized communication between said node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, the method comprising:

receiving a packet of the first type;

determining that there are no packets of the second type to be sent;

if fly-by concatenation is permitted then concatenating a bogus ack packet to the received packet and sending the received packet and the bogus ack packet; and

if fly-by concatenation is not permitted then sending the received packet, arbitrating for the bus, and sending a bogus ack packet.

9. The method of claim 8, wherein concatenating the bogus ack packet is performed by PHY hardware.

10. The method of claim 8, wherein arbitrating for control of the bus is performed by PHY hardware.

11. The method of claim 8, further comprising inspecting a first quadlet of a packet to determine a packet type.

12. The method of claim 11, wherein the first quadlet contains a transaction code, further comprising:

determining from the transaction code that the packet is a stream packet; and

determining that transmission is not occurring during an isochronous period.

13. A method for administering a data bus, the bus facilitating communication between node devices communicating over the bus using at least a first type and second type of asynchronous packet, the first type of packet not requiring that an acknowledgement packet be sent in response to transmission of such first type of packet, the method comprising:

if a packet of the second type needs to be sent, concatenating the packet of the second type to a plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated packet of the second type; and

if no packet of the second type needs to be sent, concatenating a false acknowledgement packet to the plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated false acknowledgement packet.

14. The method of claim 13, wherein concatenating the packet of the second type is performed by link hardware.

15. The method of claim 13, wherein concatenation of the false acknowledgement packet is performed by link hardware.

16. The method of claim 13, wherein concatenation of the false acknowledgement packet is performed by PHY hardware.

17. The method of claim 16, wherein link hardware is unaware that the PHY hardware performs concatenation.

18. The method of claim 13, further comprising inspecting a first quadlet of a packet to determine a packet type.

19. The method of claim 18, wherein the first quadlet contains a transaction code, further comprising:

determining from the transaction code that the packet is a stream packet; and

determining that transmission is not occurring during an isochronous period.

20. A method for administering a data bus, the bus facilitating communication between node devices communicating over the bus using at least a first type of asynchronous packet and a second type of asynchronous packet, the first type of packet having no requirement that a response packet be sent in response to transmission thereof, the method comprising:

receiving a packet of the first type;

determining that there are no packets of the second type to be sent;

if concatenation is permitted, concatenating a false response packet to the received packet and sending the received packet and the false response packet; and

if concatenation is not permitted, sending the received packet, arbitrating for the bus, and sending a false response packet.

21. The method of claim 20, wherein concatenating the false response packet is performed by PHY hardware.

22. The method of claim 20, wherein arbitrating for control of the bus is performed by PHY hardware.

23. The method of claim 20, further comprising inspecting a first quadlet of a packet to determine a packet type.

24. The method of claim 23, wherein the first quadlet contains a transaction code, further comprising:

determining from the transaction code that the packet is a stream packet; and

determining that transmission is not occurring during an isochronous period.

25. A node device adapted to administer a data bus, the bus facilitating communication between said node device and another device communicating over the bus using at least a first type and second type of asynchronous packet, the first type of packet not requiring that an acknowledgement packet be sent in response to transmission of such first type of packet, the node device comprising first apparatus adapted to:

determine if a packet of the second type needs to be sent, and if so, concatenate the packet of the second type to a plurality of packets of the first type, and send the plurality of packets of the first type followed by the concatenated packet of the second type; and

if no packet of the second type needs to be sent, concatenate a false acknowledgement packet to the plurality of packets of the first type, and send the plurality of packets of the first type followed by the concatenated false acknowledgement packet.

26. The node device of claim 25, further comprising link hardware adapted to concatenate the packet of the second type.

27. The node device of claim 25, further comprising link hardware adapted to concatenate the false acknowledgement packet.

28. The node device of claim 25, further comprising PHY hardware adapted to concatenate the false acknowledgement packet.

29. The node device of claim 25, further comprising apparatus adapted to inspect a first quadlet of a packet to determine a packet type, the first quadlet containing a transaction code.

30. The node device of claim 29, further comprising apparatus adapted to:

determine from the transaction code that the packet is a stream packet; and

determine that transmission is not occurring during an isochronous period.

31. A non-transitory computer readable medium containing instructions which, when executed by a computer, administer a serial bus that facilitates communication between node devices connected to the bus and communicating over the bus in the form of packetized communication between the node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, by performing the acts of:

if there is a packet of the second type to be sent, then concatenating the packet of the second type to a plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated packet of the second type; and

if there is no packet of the second type to be sent, then concatenating a bogus ack packet to the plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated bogus ack packet.

32. The non-transitory computer readable medium of claim 31, further comprising instructions which, when executed by a computer, instruct link hardware to perform concatenation of the packet of the second type.

33. The non-transitory computer readable medium of claim 31, further comprising instructions which, when executed by a computer, instruct link hardware to perform concatenation of the bogus ack packet.

34. The non-transitory computer readable medium of claim 31, further comprising instructions which, when executed by a computer, instruct PHY hardware to perform concatenation of the bogus ack packet.

35. The non-transitory computer readable medium of claim 34, further comprising instructions which, when executed by a computer, instruct link hardware to be unaware that PHY hardware performs concatenation.

36. The non-transitory computer readable medium of claim 31, further comprising instructions which, when executed by a computer, inspect a first quadlet of a packet to determine a packet type.

37. The non-transitory computer readable medium of claim 36, further comprising instructions which, when executed by a computer, determine from a transaction code of the first quadlet:

that the packet is a stream packet; and

that transmission is not occurring during an isochronous period.

38. A non-transitory computer readable medium containing instructions which, when executed by a computer, administer a serial bus that facilitates communication between node devices connected to the bus and communicating over the bus in the form of packetized communication between the node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, by performing the acts of:

receiving a packet of the first type;

determining that there are no packets of the second type to be sent;

if fly-by concatenation is permitted then concatenating a bogus ack packet to the received packet and sending the received packet and the bogus ack packet; and

if fly-by concatenation is not permitted then sending the received packet, arbitrating for the bus, and sending a bogus ack packet.

39. The non-transitory computer readable medium of claim 38, further comprising instructions which, when executed by a computer, instruct link hardware to concatenate the packet of the second type.

40. The non-transitory computer readable medium of claim 38, further comprising instructions which, when executed by a computer, instruct link hardware to concatenate the bogus ack packet.

41. The non-transitory computer readable medium of claim 38, further comprising instructions which, when executed by a computer, instruct PHY hardware to concatenate the bogus ack packet.

42. The non-transitory computer readable medium of claim 41, further comprising instructions which, when executed by a computer, instruct link hardware to be unaware that PHY hardware performs concatenation.

43. The non-transitory computer readable medium of claim 38, further comprising instructions which, when executed by a computer, inspect a first quadlet of a packet to determine a packet type.

44. The non-transitory computer readable medium of claim 43, further comprising instructions which, when executed by a computer, determine from a transaction code of the first quadlet:

that the packet is a stream packet; and

that transmission is not occurring during an isochronous period.

45. The non-transitory computer readable medium of claim 38, further comprising instructions which, when executed by a computer, instruct PHY hardware to arbitrate for control of the bus.

46. A node device connected to a serial bus, the node device comprising a non-transitory computer readable medium comprising instructions which, when executed by a computer, administer a serial bus that facilitates communication between the node device and a plurality of node devices connected to the bus and communicating over the bus in the form of packetized communication between the node device and the plurality of node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, by performing the acts of:

if there is a packet of the second type to be sent, then concatenating the packet of the second type to a plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated packet of the second type; and

if there is no packet of the second type to be sent, then concatenating a bogus ack packet to the plurality of packets of the first type and sending the plurality of packets of the first type followed by the concatenated bogus ack packet.

47. The node device of claim 46, comprising link hardware configured to concatenate the packet of the second type.

48. The node device of claim 46, comprising link hardware configured to concatenate the bogus ack packet.

49. The node device of claim 46, comprising PHY hardware configured to concatenate the bogus ack packet.

50. The node device of claim 49, wherein the link hardware is unaware that PHY hardware performs concatenation.

51. The node device of claim 46, comprising a non-transitory computer readable medium, comprising instructions which, when executed by a computer, inspect a first quadlet of a packet to determine a packet type.

52. The node device of claim 51, wherein the non-transitory computer readable medium, further comprises instructions which, when executed by a computer, determine from a transaction code of the first quadlet:

that the packet is a stream packet; and

that transmission is not occurring during an isochronous period.

53. A node device connected to a serial bus, the node device comprising a non-transitory computer readable medium comprising instructions which, when executed by a computer, administer a serial bus that facilitates communication between the node device and a plurality of node devices connected to the bus and communicating over the bus in the form of packetized communication between the node device and the plurality of node devices, wherein a first type of packet comprises asynchronous packets characterized by the absence of a requirement that an unarbitrated response or ack packet be sent in response to transmission of a packet of the first type, wherein a second type of packet comprises asynchronous packets, by performing the acts of:

receiving a packet of the first type;

determining that there are no packets of the second type to be sent;

if fly-by concatenation is permitted then concatenating a bogus ack packet to the received packet and sending the received packet and the bogus ack packet; and

if fly-by concatenation is not permitted then sending the received packet, arbitrating for the bus, and sending a bogus ack packet.

54. The node device of claim 53, comprising link hardware configured to concatenate the packet of the second type.

55. The node device of claim 53, comprising link hardware configured to concatenate the bogus ack packet.

56. The node device of claim 53, comprising PHY hardware configured to concatenate the bogus ack packet.

57. The node device of claim 56, wherein the link hardware is unaware that PHY hardware performs concatenation.

58. The node device of claim 53, comprising a non-transitory computer readable medium, comprising instructions which, when executed by a computer, inspect a first quadlet of a packet to determine a packet type.

59. The node device of claim 58, wherein the non-transitory computer readable medium, further comprises instructions which, when executed by a computer, determine from a transaction code of the first quadlet:

that the packet is a stream packet; and

that transmission is not occurring during an isochronous period.

60. The node device of claim 53, comprising a non-transitory computer readable medium, comprising instructions which, when executed by a computer, instruct PHY hardware to arbitrate for control of the bus.

61. A node device for administering a data bus, the bus facilitating communication between the node device and another device communicating over the bus using at least a first type of asynchronous packet and a second type of asynchronous packet, the first type of packet having no requirement that a response packet be sent in response to transmission thereof, the node device comprising apparatus adapted to:

receive a packet of the first type;

determine that there are no packets of the second type to be sent;

if concatenation is permitted, concatenate a false response packet to the received packet, and send the received packet and the false response packet; and

if concatenation is not permitted, send the received packet, arbitrate for the bus, and send the false response packet.

62. The node device of claim 61, further comprising link hardware adapted to concatenate the packet of the second type.

63. The node device of claim 61, further comprising link hardware adapted to concatenate the false acknowledgement packet.

64. The node device of claim 61, further comprising PHY hardware adapted to concatenate the false acknowledgement packet.

65. The node device of claim 61, further comprising apparatus adapted to inspect a first quadlet of a packet to determine a packet type, the first quadlet containing a transaction code.

66. The node device of claim 65, further comprising apparatus adapted to:

determine from the transaction code that the packet is a stream packet; and

determine that transmission is not occurring during an isochronous period.

67. The node device of claim 61, further comprising PHY hardware adapted to arbitrate for control of the bus.