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Digital locked loop on channel tagged memory requests for memory optimization

  • US 7,996,642 B1
  • Filed: 04/22/2008
  • Issued: 08/09/2011
  • Est. Priority Date: 04/25/2007
  • Status: Active Grant
First Claim
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1. A method for performing memory optimization on a memory, the method comprising:

  • receiving from a processor a plurality of read/write requests, wherein at least a portion of the read/write requests are assigned respective identifiers for associating related ones of the read/write requests, such that a series of read/write requests having matching identifiers are associated and related with one another;

    measuring arrival times of the read/write requests assigned to each of the identifiers;

    determining a periodicity and a phase of the read/write requests based on the identifiers in order to determine predicted arrival times of future read/write requests assigned to each of the identifiers;

    creating a real-time schedule of memory requests using the arrival times of the read/write requests and the predicted arrival times of the future read/write requests;

    using the real-time schedule to determine idle periods during which none of the read/write requests will be received; and

    performing opportunistic functions in the memory during the idle periods, including performing at least one of garbage collection and translation cache pre-fetch.

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