System and method for data synchronization for a computer architecture for broadband networks

• US 7,999,813 B2
• Filed: 10/18/2004
• Issued: 08/16/2011
• Est. Priority Date: 03/22/2001
• Status: Expired due to Fees

• Current Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Original Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Inventors: Yamazaki, Takeshi, Suzuoki, Masakazu
• Primary Examiner(s): Hsu; Joni
• Application Number:
  US10/967,363
• Publication Number:
  US 20050078117A1
• Time in Patent Office: 2,493 Days
• Field of Search: 345/502, 345/501, 345/530, 345/541, 345/544, 345/506, 345/553, 345/418, 345/419, 345/519, 711/153, 711/148, 711/173, 711/163, 711/147, 711/100
• US Class Current: 345/502
• CPC Class Codes: G06F 12/1466 Key-lock mechanism
• CPC Class Codes: H04L 69/12 Protocol engines

Abstract

A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A processing system for performing graphics processing is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors can perform graphics processing on a first set of graphics data to generate a second set of graphics data, and another of the second processors can perform graphics processing on the second set to generate a third set of graphics data.

Claims

1. A processing system for performing graphics processing, comprising:

a first processor of a first processor type; and

a plurality of second processors of a second processor type operatively connected to the first processor, the plurality of second processors each being configured to perform graphics processing, at least a first selected one of the second processors being operable to perform a first graphics process on a first set of graphics data associated with a multi-dimensional object to generate a second set of graphics data, and a second selected one of the second processors being operable to perform a second graphics process on a selected set of graphics data to generate a third set of graphics data;

wherein the second set of graphics data comprises a first display list for displaying the multi-dimensional object on a two-dimensional display, the processing system generates a second display list for displaying another multi-dimensional object on a two-dimensional display, and any of the second processors which has not generated the first or second display lists is operable to independently arbitrate among the display lists and to send a selected one of the first and second display lists to another one of the second processors for rendering, and wherein the selected set of graphics data comprises the selected one of the first and second display lists.

2. The processing system of claim 1, wherein the third set of graphics data comprises pixel data.

3. The processing system of claim 2, wherein the second selected one of the second processors comprises a pixel engine dedicated to generating the pixel data as the third set of graphics data.

4. A video system comprising:

a bus;

a graphics processor for generating graphic primitives and transmitting the graphic primitives onto the bus; and

a rendering processor for receiving the graphic primitives from the bus and rendering the graphic primitives to provide pixel data for a video signal;

wherein the graphics processor and the rendering processor each comprise a modular structure, the modular structure comprising one or more processing elements, each of the processing elements comprising a plurality of processing units each configured to perform graphics processing, a plurality of local memories associated with respective ones of the processing units for storing programs and data processed by the respective processing unit, a direct memory access controller for retrieving the programs and data from a main memory shared by the processing elements and a control processor for controlling the processing of the processing units, and a selected one of the plurality of processing units of the graphics processor or the rendering processor is operable to independently arbitrate among a plurality of display lists and to send selected ones of the display lists to other ones of the processing units for rendering.

5. The system of claim 4, wherein the bus provides a local connection between the graphics processor and the rendering processor.

6. The system of claim 4, further comprising a set-top box and a video display device, and wherein the graphics processor is located within the set-top box, the rendering processor is located within the video display device and the bus connects the set-top box and the video display device.

7. The system of claim 4, wherein the graphics processor and the rendering processor are fabricated as integrated circuits mounted on a common substrate to provide a multichip module, and the bus provides a local connection within the multichip module.

8. The system of claim 7, wherein the rendering processor and the main memory are fabricated as a single integrated circuit.

9. The system of claim 4, wherein the rendering processor further comprises a frame buffer.

10. The system of claim 4, wherein the rendering processor further comprises a frame buffer for storing the pixel data and a display controller for converting the pixel data into the video signal.

11. A graphics processing method, comprising:

establishing a dedicated group of processors of a first processor type, each of the processors of the first processor type being configured to perform graphics processing, at least one of the dedicated group of processors being operatively connected to a processor of a second processor type;

performing a first graphics process on a first set of graphics data associated with a multi-dimensional object using a first one of the dedicated group of processors to generate a second set of graphics data, the second set of graphics data comprising a first display list for displaying the multi-dimensional object on a display;

performing a second graphics process on a selected set of graphics data using a second one of the dedicated group of processors to generate a third set of graphics data;

independently arbitrating among the first display list and a second display list for displaying another multi-dimensional object on the display using a third one of the dedicated group of processors; and

the third processor assigning the selected set of graphics data to the second one of the dedicated group of processors for generating pixel data, where the selected set of graphics data comprises a selected one of the first and second display lists.

12. The method of claim 11, further comprising storing the second set of graphics data in a non-cache local memory of the second one of the dedicated group of processors.

13. The method of claim 11, further comprising generating a video signal from the second set of graphics data.

14. A graphics processing method, comprising:

establishing a dedicated group of processors of a first processor type, at least one of the dedicated group of processors being operatively connected to a processor of a second processor type;

assigning a plurality of sandboxes in a shared memory to the dedicated group of processors, each of the plurality of sandboxes being associated with one of the dedicated group of processors;

storing a first set of graphics data in a first one of the plurality of sandboxes, the first set of graphics data being associated with a first multi-dimensional object, and the first sandbox being a source sandbox;

storing a second set of graphics data in a second one of the plurality of sandboxes, the second set of graphics data being associated with a second multi-dimensional object, and the second sandbox being another source sandbox;

performing a first graphics process on the first set of graphics data using a first one of the dedicated group of processors to generate a modified first set of graphics data, the modified first set of graphics data comprising a first display list for displaying the first multi-dimensional object on a display;

performing a second graphics process on the second set of graphics data using a second one of the dedicated group of processors to generate a modified second set of graphics data, the modified second set of graphics data comprising a second display list for displaying the second multi-dimensional object on a display;

storing the modified first set of graphics data in a third one of the sandboxes, the third sandbox being a destination sandbox;

storing the modified second set of graphics data in a fourth one of the sandboxes, the fourth sandbox being another destination sandbox;

receiving the first and second display lists at a third one of the dedicated group of processors;

arbitrating among the first and second display lists at the third processor;

sending at least one of the arbitrated display lists to a fourth one of the dedicated group of processors; and

performing a third graphics process on the at least one of the arbitrated display lists using the fourth processor to generate a third set of graphics data.

15. A processing system for performing graphics processing, comprising:

a first processor of a first processor type;

a plurality of sandboxes in a shared memory; and

a plurality of second processors of a second processor type operatively connected to the first processor, the plurality of second processors each being configured to perform graphics processing, each of the plurality of sandboxes associated with at least one of the plurality of second processors, at least a first selected one of the second processors being operable to perform a first graphics process on a first set of graphics data stored in a first one of the plurality of sandboxes, the first sandbox functioning as a source sandbox and associated with a multi-dimensional object to generate a second set of graphics data stored in a second one of the plurality of sandboxes, the second sandbox functioning as a destination sandbox, and a second selected one of the second processors being operable to perform a second graphics process on a selected set of graphics data stored in a selected sandbox, the one of the plurality of sandboxes functioning as a source sandbox to generate a third set of graphics data stored in a third one of the plurality of sandboxes, the third sandbox functioning as a destination sandbox;

wherein the second set of graphics data comprises a first display list for displaying the multi-dimensional object on a two-dimensional display, the processing system generates a second display list for displaying another multi-dimensional object on a two-dimensional display, and any of the second processors which has not generated the first or second display lists is operable to independently arbitrate among the display lists and to select a sandbox containing one of the first and second display lists as the selected sandbox for rendering by the second selected one of the second processors.

16. A video system comprising:

a bus;

a graphics processor for generating graphic primitives and transmitting the graphic primitives onto the bus; and

a rendering processor for receiving the graphic primitives from the bus and rendering the graphic primitives to provide pixel data for a video signal;

wherein the graphics processor and the rendering processor each comprise a modular structure, the modular structure comprising one or more processing elements, each of the processing elements comprising a plurality of processing units each configured to perform graphics processing, a plurality of local memories associated with respective ones of the processing units for storing programs and data processed by the respective processing unit, a direct memory access controller for retrieving the programs and data from a main memory shared by the processing elements and a control processor for controlling the processing of the processing units, and a selected one of the plurality of processing units of the graphics processor or the rendering processor is operable to independently arbitrate among a plurality of display lists each of the plurality of display lists stored within one of the plurality of local memories and to send selected ones of the display lists to other ones of the processing units for rendering.

17. A graphics processing method, comprising:

establishing a dedicated group of processors of a first processor type, each of the processors of the first processor type being configured to perform graphics processing, at least one of the dedicated group of processors being operatively connected to a processor of a second processor type;

assigning a plurality of sandboxes in a shared memory to the dedicated group of processors, each of the plurality of sandboxes being associated with at least one of the dedicated group of processors;

performing a first graphics process on a first set of graphics data associated with a multi-dimensional object stored within a first one of the plurality of sandboxes using a first one of the dedicated group of processors to generate a second set of graphics data, the second set of graphics data comprising a first display list for displaying the multi-dimensional object on a display;

storing the second set of graphics data within a second one of the plurality of sandboxes;

performing a second graphics process on a selected set of graphics data using a second one of the dedicated group of processors to generate a third set of graphics data;

storing the third set of graphics data within a third one of the plurality of sandboxes;

independently arbitrating among the first display list and a second display list for displaying another multi-dimensional object on the display using a third one of the dedicated group of processors; and

the third processor assigning a selected one of the first and second display lists to the second one of the dedicated group of processors for generating pixel data, wherein the selected set of graphics data comprises the selected one of the first and second display lists.