Buck boost function based on a capacitor bootstrap input buck converter

• US 8,000,117 B2
• Filed: 06/09/2009
• Issued: 08/16/2011
• Est. Priority Date: 08/13/2008
• Status: Active Grant

• Current Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Original Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Inventors: Petricek, Shea
• Primary Examiner(s): Riley; Shawn
• Application Number:
  US12/480,823
• Publication Number:
  US 20100039085A1
• Time in Patent Office: 798 Days
• Field of Search: 363/59, 363/60, 323/266, 327/535, 327/536
• US Class Current: 363/60
• CPC Class Codes: H02M 1/0095 Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/1582 Buck-boost converters H02M3/1584 takes precedence

Abstract

A buck boost voltage converter circuit has a capacitor pump circuit for boosting an input voltage in a first mode of operation when an input voltage is below a desired voltage level. A buck converter circuit provides the output voltage responsive to the boosted input voltage from the capacitor pump circuit in the first mode of operation and provides the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired voltage level.

Claims

1. A buck boost voltage converter circuit, comprising:

a capacitor pump circuit for boosting an input voltage in a first mode of operation when an input voltage is below a desired level; and

a buck converter circuit for providing the output voltage responsive to the boosted input voltage from the capacitor pump circuit in the first mode of operation and for providing the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired level wherein the buck converter circuit further comprises;

a high side switching transistor connected to receive either the input voltage or the boosted input voltage;

a low side switching transistor connected between the high side switching transistor and ground;

an inductor connected between the high side switching transistor and an output node; and

an output capacitor connected between the output node and ground;

wherein the capacitor pump circuit is operated in unison with the high side switching transistor to provide twice the input voltage when the high-side switching transistor is turned on in the first mode of operation and to provide the input voltage when the high-side switching transistor is turned off in the first mode of operation.

2. The buck boost voltage converter circuit of claim 1, wherein the boosted input voltage is approximately twice the input voltage.

3. The buck boost voltage converter circuit of claim 1, wherein the capacitor pump circuit is enabled in the first mode of operation and disabled in the second mode of operation.

4. The buck boost voltage converter circuit of claim 1, wherein the capacitor pump circuit further comprises:

a first transistor connected between an input voltage node for receiving the input voltage and an output node of the capacitor boost circuit connected to the high side switching transistor;

a second transistor connected in series with the first transistor;

a third transistor connected between the second transistor and the ground; and

a capacitor connected between the third transistor and the output node.

5. The buck boost voltage converter circuit of claim 4, wherein the second transistor is always turned on to disable the capacitor pump circuit.

6. The buck boost voltage converter circuit of claim 1, wherein the capacitor pump circuit is enabled and the buck converter is disabled if the input voltage is lower than the desired level and the capacitor pump circuit is disabled and the buck converter is enabled if the input voltage is higher than the desired level.

7. A method for providing a regulated output voltage responsive to an input voltage, comprising the steps of:

comparing the input voltage to a desired voltage level;

boosting the input voltage in a first mode of operation when an input voltage is below the desired voltage level using a capacitor pump circuit;

generating the output voltage responsive to the boosted input voltage in the first mode of operation using a buck converter;

generating the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired voltage level using the buck converter;

enabling the capacitor pump circuit in the first mode of operation; and

disabling the buck converter in the second mode of operation.

8. The method of claim 7, wherein the step of boosting the input voltage comprises the step of boosting the input voltage to approximately twice the input voltage.

9. The method of claim 7, further including the steps of to provide twice the input voltage when the high-side switching transistor is turned on in the first mode of operation and to provide the input voltage when the high-side switching transistor is turned off in the first mode of operation.

10. The method of claim 7, further including the steps of:

determining if the input voltage is higher or lower than the desired voltage level;

enabling the capacitor pump circuit and disabling the buck converter if the input voltage is lower than the desired voltage level; and

disabling the capacitor pump circuit and enabling the buck converter if the input voltage is higher than the desired voltage level.

11. A buck boost voltage converter circuit, comprising:

a capacitor pump circuit for boosting an input voltage to approximately twice the input voltage in a first mode of operation when an input voltage is below a desired voltage level, wherein the capacitor pump circuit further comprises;

a first transistor connected between an input voltage node for receiving the input voltage and an output node of the capacitor boost circuit connected to the high side switching transistor;

a second transistor connected in series with the first transistor;

a third transistor connected between the second transistor and the ground; and

a capacitor connected between the third transistor and the output node; and

wherein the capacitor pump circuit is enabled in the first mode of operation and disabled in the second mode of operation;

a buck converter circuit for providing the output voltage responsive to the boosted input voltage from the capacitor pump circuit in the first mode of operation and for providing the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired voltage level, wherein the buck converter circuit further comprises;

a high side switching transistor connected to receive either the input voltage or the boosted input voltage;

a low side switching transistor connected between the high side switching transistor and ground;

an inductor connected between the high side switching transistor and an output node; and

an output capacitor connected between the output node and ground.

12. The buck boost voltage converter circuit of claim 11, wherein the capacitor pump circuit is operated in unison with the high side switching transistor to provide twice the input voltage when the high-side switching transistor is turned on in the first mode of operation and to provide the input voltage when the high-side switching transistor is turned off in the first mode of operation.

13. The buck boost voltage converter circuit of claim 11, wherein the second transistor is always turned on to disable the capacitor pump circuit

14. The buck boost voltage converter circuit of claim 11, wherein the boosted input voltage is approximately twice the input voltage.

15. The buck boost voltage converter circuit of claim 11, wherein the capacitor pump circuit is enabled in the first mode of operation and disabled in the second mode of operation.

16. The buck boost voltage converter circuit of claim 11, wherein the capacitor pump circuit is enabled and the buck converter is disabled if the input voltage is lower than the desired level and the capacitor pump circuit is disabled and the buck converter is enabled if the input voltage is higher than the desired level.