Compensation for voltage drifts in analog memory cells

• US 8,000,141 B1
• Filed: 10/15/2008
• Issued: 08/16/2011
• Est. Priority Date: 10/19/2007
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Anobit Technologies, Ltd. (Apple Inc.)
• Inventors: Shalvi, Ofir, Sommer, Naftali
• Primary Examiner(s): Nguyen; Dang T
• Application Number:
  US12/251,471
• Time in Patent Office: 1,035 Days
• Field of Search: 365/185.09, 365/185.22, 365/185.19, 365/185.03, 365/185.2, 365/189.07, 365/185.21
• US Class Current: 365/185.09
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3404 Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS

Abstract

A method for data storage includes storing data in a group of analog memory cells by writing respective first storage values into the memory cells. After storing the data, respective second storage values are read from the memory cells. A subset of the memory cells, in which the respective second storage values have drifted below a minimum readable value, is identified. The memory cells in the subset are operated on, so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value. At least the modified second storage values are re-read so as to reconstruct the stored data.

Claims

1. A method for data storage, comprising:

storing data in a group of analog memory cells of a memory by writing into the memory cells respective first storage values that are above a minimum readable value that can be sensed by the memory;

after storing the data, reading respective second storage values from the memory cells;

identifying a subset of the memory cells in which the respective second storage values have drifted from the respective first storage values that were above the minimum readable value and have decreased to below the minimum readable value;

operating on the memory cells in the identified subset so as to cause the second storage values of at least one of the memory cells in the subset to again exceed the minimum readable value; and

re-reading at least the modified second storage values so as to reconstruct the stored data.

2. The method according to claim 1, wherein operating on the memory cells in the subset comprises applying one or more programming pulses to the memory cells in the subset.

3. The method according to claim 2, wherein applying the programming pulses comprises determining a first number of the memory cells in the subset, and applying the programming pulses iteratively until a second number of the memory cells in the subset, whose second storage values increased above the minimum readable value due to the programming pulses, exceeds the first number.

5. The method according to claim 1, wherein operating on the memory cells in the subset comprises modifying a temperature of the memory cells.

6. The method according to claim 5, wherein modifying the temperature comprises modifying a rate of memory access operations applied to the memory cells.

7. The method according to claim 5, wherein modifying the temperature comprises controlling a heating device that is thermally coupled to the memory cells.

8. The method according to claim 1, wherein storing the data comprises encoding the data with an Error Correcting Code (ECC), and comprising applying ECC decoding to at least the re-read modified second storage values.

9. The method according to claim 1, wherein the first and second storage values comprise threshold voltages of the analog memory cells, and wherein the minimum readable voltage comprises zero volts.

10. The method according to claim 1, wherein identifying the subset comprises detecting a difference in an operating condition of the memory cells between a first time at which the first storage values were written and a second time at which the second storage values were read.

11. The method according to claim 1, wherein identifying the subset comprises comparing a first number of the memory cells in which the first storage values are below the minimum readable value and a second number of the memory cells in which the second storage values are below the minimum readable value.

27. The method according to claim 1, wherein storing the data comprises writing the first storage values in an iterative Programming &

Verification (P&

V) process in which the first storage values are final target values that represent the data to be stored in the memory cells, and wherein identifying the subset comprises identifying the memory cells in which the final target values of the P&

V process have drifted below the minimum readable value.

4. A method for data storage, comprising:

storing data in a group of analog memory cells by writing respective first storage values into the memory cells;

after storing the data, reading respective second storage values from the memory cells;

identifying a subset of the memory cells in which the respective second storage values have drifted below a minimum readable value;

operating on the memory cells in the subset so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value; and

re-reading at least the modified second storage values so as to reconstruct the stored data,

wherein operating on the memory cells in the subset comprises re-reading multiple instances of the second storage values from the memory cells in the subset, selecting one or more of the memory cells in the subset in which at least one of the re-read instances of the second storage values was raised above the minimum readable value due to reading noise, and associating the selected memory cells with a programming level corresponding to the first storage values that are directly above the minimum readable value.

12. A method for data storage, comprising:

storing data in a group of analog memory cells by writing respective first storage values into the memory cells;

after storing the data, reading respective second storage values from the memory cells;

identifying a subset of the memory cells in which the respective second storage values have drifted below a minimum readable value;

writing third storage values into one or more of the memory cells that neighbor the memory cells in the subset, wherein the third storage values are selected so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value; and

re-reading at least the modified second storage values so as to reconstruct the stored data.

13. Apparatus for data storage, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a processor, which is coupled to store data in a group of the analog memory cells by writing into the memory cells respective first storage values that are above a minimum readable value that can be sensed by the memory, to read respective second storage values from the memory cells after storing the data, to identify a subset of the memory cells in which the respective second storage values have drifted from the respective first storage values that were above the minimum readable value and have decreased to below a the minimum readable value, to operate on the memory cells in the identified subset so as to cause the second storage values of at least one of the memory cells in the subset to again exceed the minimum readable value, and to re-read at least the modified second storage values so as to reconstruct the stored data.

14. The apparatus according to claim 13, wherein the processor is coupled to apply one or more programming pulses to the memory cells in the subset.

15. The apparatus according to claim 14, wherein the processor is coupled to determine a first number of the memory cells in the subset and to apply the programming pulses iteratively until a second number of the memory cells in the subset, whose second storage values increased above the minimum readable value due to the programming pulses, exceeds the first number.

17. The apparatus according to claim 13, wherein the processor is coupled to operate on the memory cells in the subset by modifying a temperature of the memory cells.

18. The apparatus according to claim 17, wherein the processor is coupled to modify the temperature by modifying a rate of memory access operations applied to the memory cells.

19. The apparatus according to claim 17, and comprising a heating device that is thermally coupled to the memory cells, wherein the processor is coupled to modify the temperature by controlling the heating device.

20. The apparatus according to claim 13, wherein the processor is coupled to encode the stored data with an Error Correcting Code (ECC), and to apply ECC decoding to at least the re-read modified second storage values.

21. The apparatus according to claim 13, wherein the first and second storage values comprise threshold voltages of the analog memory cells, and wherein the minimum readable voltage comprises zero volts.

22. The apparatus according to claim 13, wherein the processor is coupled to identify the subset by detecting a difference in an operating condition of the memory cells between a first time at which the first storage values were written and a second time at which the second storage values were read.

23. The apparatus according to claim 13, wherein the processor is coupled to identify the subset by comparing a first number of the memory cells in which the first storage values are below the minimum readable value and a second number of the memory cells in which the second storage values are below the minimum readable value.

28. The apparatus according to claim 13, wherein the processor is coupled to write the first storage values in an iterative Programming &

Verification (P&

V) process in which the first storage values are final target values that represent the data to be stored in the memory cells, and to identify the subset by identifying the memory cells in which the final target values of the P&

V process have drifted below the minimum readable value.

16. Apparatus for data storage, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a processor, which is coupled to store data in a group of the analog memory cells by writing respective first storage values into the memory cells, to read respective second storage values from the memory cells after storing the data, to identify a subset of the memory cells in which the respective second storage values have drifted below a minimum readable value, to operate on the memory cells in the subset so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value, and to re-read at least the modified second storage values so as to reconstruct the stored data,

wherein the processor is coupled to re-read multiple instances of the second storage values from the memory cells in the subset, to select one or more of the memory cells in the subset in which at least one of the re-read instances of the second storage values was raised above the minimum readable value due to reading noise, and to associate the selected memory cells with a programming level corresponding to the first storage values that are directly above the minimum readable value.

24. Apparatus for data storage, comprising:

an interface, which is operative to communicate with a memory that includes a plurality of analog memory cells; and

a processor, which is coupled to store data in a group of the analog memory cells by writing respective first storage values into the memory cells, to read respective second storage values from the memory cells after storing the data, to identify a subset of the memory cells in which the respective second storage values have drifted below a minimum readable value, to write third storage values into one or more of the memory cells that neighbor the memory cells in the subset, wherein the third storage values are selected so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value, and to re-read at least the modified second storage values so as to reconstruct the stored data.

25. Apparatus for data storage, comprising:

a memory, which comprises a plurality of analog memory cells; and

a processor, which is coupled to store data in a group of the analog memory cells by writing into the memory cells respective first storage values that are above a minimum readable value that can be sensed by the memory, to read respective second storage values from the memory cells after storing the data, to identify a subset of the memory cells in which the respective second storage values have drifted from the respective first storage values that were above the minimum readable value and have decreased to below the minimum readable value, to operate on the memory cells in the identified subset so as to cause the second storage values of at least one of the memory cells in the subset to again exceed the minimum readable value, and to re-read at least the modified second storage values so as to reconstruct the stored data.

26. Apparatus for data storage, comprising:

a memory, which comprises a plurality of analog memory cells; and

a processor, which is coupled to store data in a group of the analog memory cells by writing respective first storage values into the memory cells, to read respective second storage values from the memory cells after storing the data, to identify a subset of the memory cells in which the respective second storage values have drifted below a minimum readable value, to write third storage values into one or more of the memory cells that neighbor the memory cells in the subset, wherein the third storage values are selected so as to cause the second storage values of at least one of the memory cells in the subset to exceed the minimum readable value, and to re-read at least the modified second storage values so as to reconstruct the stored data.