Predicting IC manufacturing yield by considering both systematic and random intra-die process variations
First Claim
1. A method for predicting a manufacturing yield for a die within a semiconductor wafer, the method comprising:
- receiving a physical layout of the die;
partitioning the die into an array of tiles;
computing systematic variations for a quality indicative parameter across the array of tiles based on the physical layout of the die, which includes;
performing a physical layout extraction across the array of tiles; and
determining values for the quality indicative parameter based at least on results of the physical layout extraction;
applying a random variation for the quality indicative parameter to each tile in the array of tiles;
iteratively placing instances of a window in the die until the die is covered with instances of the window, wherein each iteration includes,selecting a tile from the array of tiles which satisfies a criterion and is not covered by an instance of the window, andplacing an instance of the window around the selected tile;
computing spatial correlations for the random variations between the selected tiles; and
computing the manufacturing yield for the die based at least on the systematic variations, the random variations, and the spatial correlations for the random variations.
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Abstract
One embodiment of the present invention provides a system that predicts manufacturing yield for a die within a semiconductor wafer. During operation, the system first receives a physical layout of the die. Next, the system partitions the die into an array of tiles. The system then computes systematic variations for a quality indicative value to describe a process parameter across the array of tiles based on the physical layout of the die. Next, the system applies a random variation for the quality indicative parameter to each tile in the array of tiles. Finally, the system obtains the manufacturing yield for the die based on both the systematic variations and the random variations.
17 Citations
18 Claims
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1. A method for predicting a manufacturing yield for a die within a semiconductor wafer, the method comprising:
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receiving a physical layout of the die; partitioning the die into an array of tiles; computing systematic variations for a quality indicative parameter across the array of tiles based on the physical layout of the die, which includes; performing a physical layout extraction across the array of tiles; and determining values for the quality indicative parameter based at least on results of the physical layout extraction; applying a random variation for the quality indicative parameter to each tile in the array of tiles; iteratively placing instances of a window in the die until the die is covered with instances of the window, wherein each iteration includes, selecting a tile from the array of tiles which satisfies a criterion and is not covered by an instance of the window, and placing an instance of the window around the selected tile; computing spatial correlations for the random variations between the selected tiles; and computing the manufacturing yield for the die based at least on the systematic variations, the random variations, and the spatial correlations for the random variations. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A non-transitory computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for predicting a manufacturing yield for a die within a semiconductor wafer, the method comprising:
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receiving a physical layout of the die; partitioning the die into an array of tiles; computing systematic variations for a quality indicative parameter across the array of tiles based on the physical layout of the die, which includes; performing a physical layout extraction across the array of tiles; and determining values for the quality indicative parameter based at least on results of the physical layout extraction; applying a random variation for the quality indicative parameter to each tile in the array of tiles; iteratively placing instances of a window in the die until the die is covered with instances of the window, wherein each iteration includes, selecting a tile from the array of tiles which satisfies a criterion and is not covered by an instance of the window, and placing an instance of the window around the selected tile; computing spatial correlations for the random variations between the selected tiles; and computing the manufacturing yield for the die based at least on the systematic variations, the random variations, and the spatial correlations for the random variations. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An apparatus for predicting a manufacturing yield for a die within a semiconductor wafer, the apparatus comprising:
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a receiving mechanism configured to receive a physical layout of the die; a partitioning mechanism configured to partition the die into an array of tiles; a first computing mechanism configured to compute systematic variations for a quality indicative parameter across the array of tiles based on the physical layout of the die, wherein the first computing mechanism is configured to; perform a physical layout extraction across the array of tiles; and determine values for the quality indicative parameter based at least on results of the physical layout extraction; an applying mechanism configured to apply a random variation for the quality indicative parameter to each tile in the array of tiles; a placing mechanism configured to iteratively place instances of a window in the die until the entire die is covered with instances of the window, wherein each iteration includes, selecting a tile from the array of tiles which satisfies a criterion and is not covered by an instance of the window, and placing an instance of the window around the selected tile; a second computing mechanism configured to compute spatial correlations for the random variations between the selected tiles; and a third computing mechanism configured to compute the manufacturing yield for the die based at least on the systematic variations, the random variations, and the spatial correlations for the random variations. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification