Memory board with self-testing capability
DC CAFCFirst Claim
1. A self-testing memory module, comprising:
- a printed circuit board configured to be operatively coupled to a memory controller of a computer system;
a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports; and
a circuit comprising;
a control module configured to generate address and control signals for testing the memory devices; and
a data module comprising a plurality of data handlers, each data handler operable independently from each of the other data handlers of the plurality of data handlers and operatively coupled to a corresponding plurality of the data ports of one or more of the memory devices and configured to generate data for writing to the corresponding plurality of data ports, wherein the circuit is configured to test the memory devices using the address and control signals generated by the control module and the data generated by the plurality of data handlers.
4 Assignments
Litigations
4 Petitions
Accused Products
Abstract
A self-testing memory module includes a printed circuit board configured to be operatively coupled to a memory controller of a computer system and includes a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports. The memory module also includes a control module configured to generate address and control signals for testing the memory devices. The memory module includes a data module comprising a plurality of data handlers. Each data handler is operable independently from each of the other data handlers of the plurality of data handlers. Each data handler is operatively coupled to a corresponding plurality of the data ports of one or more of the memory devices and is configured to generate data for writing to the corresponding plurality of data ports.
224 Citations
35 Claims
-
1. A self-testing memory module, comprising:
-
a printed circuit board configured to be operatively coupled to a memory controller of a computer system; a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports; and a circuit comprising; a control module configured to generate address and control signals for testing the memory devices; and a data module comprising a plurality of data handlers, each data handler operable independently from each of the other data handlers of the plurality of data handlers and operatively coupled to a corresponding plurality of the data ports of one or more of the memory devices and configured to generate data for writing to the corresponding plurality of data ports, wherein the circuit is configured to test the memory devices using the address and control signals generated by the control module and the data generated by the plurality of data handlers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
-
-
20. A self-testing memory module, comprising:
-
a printed circuit board configured to be operatively coupled to a memory controller of a computer system; a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports; and a circuit comprising; a control module configured to generate address and control signals for testing the memory devices; and a data module comprising at least one data handler operatively coupled to a corresponding plurality of the data ports of one or more of the memory devices and configured to generate cyclic data for writing to the corresponding plurality of data ports wherein the circuit is configured to test the memo devices using the address and control signals generated by the control module and the cyclic data generated by the at least one data handler. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28)
-
-
29. A method of self-testing a memory module, comprising:
-
providing a self-testing memory module, the self-testing memory module comprising; a printed circuit board configured to be operatively coupled to a memory controller of a computer system; a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports; and a circuit comprising; a control module configured to generate address and control signals for testing the memory devices; and a data module comprising a plurality of data handlers, each data handler operable independently from each of the other data handlers of the plurality of data handlers and operatively coupled to a corresponding plurality of the data ports; and generating, by the control module, address and control signals for testing the memory devices; generating, by each of the data handlers, data for writing to the corresponding plurality of data ports; and using the address and control signals and the generated data to test the memory devices. - View Dependent Claims (30, 31, 32, 33, 34, 35)
-
Specification