Isolation circuit
First Claim
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1. An isolation circuit, comprising:
- a first transistor configured for connection to a supply voltage via a first terminal;
a register connected to the first transistor;
a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register;
wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register; and
wherein the resistor is connected to the second terminal and the second terminal is coupled to testing circuitry; and
wherein the status of the register controls a state of the second transistor such that;
a first amount of current is drawn, in response to a particular potential applied to the first terminal, when a die to which the isolation circuit is connected is a good die; and
a different amount of current is drawn, in response to the particular potential applied to the first terminal, when the die to which the isolation circuit is connected is a bad die.
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Abstract
The present disclosure includes various method, device, and system embodiments for isolation circuits. One such isolation circuit embodiment includes: a first transistor configured for connection to a supply voltage via a first terminal; a register connected to the first transistor; a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register; and wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register.
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Citations
23 Claims
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1. An isolation circuit, comprising:
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a first transistor configured for connection to a supply voltage via a first terminal; a register connected to the first transistor; a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register; wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register; and wherein the resistor is connected to the second terminal and the second terminal is coupled to testing circuitry; and
wherein the status of the register controls a state of the second transistor such that;a first amount of current is drawn, in response to a particular potential applied to the first terminal, when a die to which the isolation circuit is connected is a good die; and a different amount of current is drawn, in response to the particular potential applied to the first terminal, when the die to which the isolation circuit is connected is a bad die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. An isolation circuit, comprising:
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a resistor connected in parallel with a first transistor to a first supply voltage input terminal; a register having an output connected to a gate of the first transistor, the register connected to the first supply voltage input terminal; and wherein the resistor is connected to a second supply voltage input terminal, the second supply voltage input terminal coupled to testing circuitry; and
wherein a status of the register controls a state of the first transistor such that;a first amount of current is drawn, in response to a particular potential applied to the first supply voltage input terminal, when a die to which the isolation circuit is connected is a good die; and a different amount of current is drawn, in response to the particular potential applied to the first supply voltage input terminal, when the die to which the isolation circuit is connected is a bad die. - View Dependent Claims (16, 17, 18, 19)
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20. An isolation circuit, comprising:
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a resistor connected in parallel with a first transistor to a first supply voltage input terminal; a register having an output connected to a gate of the first transistor, the register connected to the first supply voltage input terminal; a second transistor connected between the first supply voltage input terminal and the register; and wherein the resistor is connected to a second supply voltage terminal, the second supply voltage terminal coupled to testing circuitry; and
wherein a status of the register controls a state of the first transistor such that;a first amount of current is drawn, in response to a particular potential applied to the first supply voltage terminal, when a die to which the isolation circuit is connected is a good die; and a different amount of current is drawn, in response to the particular potential applied to the first supply voltage terminal, when the die to which the isolation circuit is connected is a bad die. - View Dependent Claims (21, 22, 23)
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Specification