Switched capacitor projection scan multi-touch sensor array

• US 8,004,500 B2
• Filed: 10/26/2007
• Issued: 08/23/2011
• Est. Priority Date: 10/26/2007
• Status: Expired due to Fees

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Elias, John Greer
• Primary Examiner(s): Hjerpe; Richard
• Assistant Examiner(s): HARRIS, DOROTHY H
• Application Number:
  US11/925,679
• Publication Number:
  US 20090109190A1
• Time in Patent Office: 1,397 Days
• Field of Search: 345173-183, 178 1801- 1806, 200/600
• US Class Current: 345/174
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
• CPC Class Codes: G06F 3/0448 Details of the electrode shape, e.g. for enhancing the detection of touches, for generating specific electric field shapes, for enhancing display quality

Abstract

A touch sensor panel can be constructed on a single surface of a substrate as a plurality of distributed RC lines arranged in rows and columns. Each distributed RC line can include alternating connected transistors and metal pads. During operation, the transistors on either side of the metal pads in the rows are alternately gated on and off using non-overlapping gate signals, and pulse travel times for each row in both directions are measured. Similar measurements are taken for the columns. The frequency at which the transistors are gated can be changed to adjust pulse travel times. Equalized travel times are computed as the sum of the pulse travel times in both directions, and indicate which rows and columns have a finger touching it. The un-equalized pulse travel time data can then be used to determine the relative positions of the fingers within the rows and columns.

Claims

1. A single-surface touch sensor panel, comprising:

a plurality of distributed RC lines arranged in an array of rows and columns, the distributed RC lines including alternating connected transistors and metal pads formed on a single surface of a sensor panel substrate, each transistor having drain and source terminals connected to adjacent metal pads;

first and second column gate signal lines connected to gate terminals of the transistors on either side of each metal pad arranged in a column; and

first and second row gate signal lines connected to the gate terminals of the transistors on either side of each metal pad arranged in a row;

wherein the first and second column gate signal lines are configured for receiving non-overlapping first and second column gate signals to alternately gate the transistors in each column on and off and provide an effective resistance for each column; and

wherein the first and second row gate signal lines are configured for receiving non-overlapping first and second row gate signals to alternately gate the transistors in each row on and off and provide an effective resistance for each row.

2. The single-surface touch sensor panel of claim 1, further comprising:

one or more clock circuits configured for generating the first and second column gate signals and the first and second row gate signals;

one or more drivers couplable to both ends of every distributed RC line for driving a pulse through the distributed RC line in different directions;

one or more comparators couplable to both ends of every distributed RC line for receiving the pulse from the distributed RC line; and

pulse travel time measurement logic configured for measuring a travel time of each pulse as it passes through the distributed RC line.

3. The single-surface touch sensor panel of claim 1, the one or more clock circuits further configured for adjusting a frequency of the first and second column gate signals or the first and second row gate signals to modify the effective resistance of the columns or rows.

4. The single-surface touch sensor panel of claim 1, the one or more clock circuits further configured for adjusting a duty cycle of the first and second column gate signals or the first and second row gate signals to modify the effective resistance of the columns or rows.

5. The single-surface touch sensor panel of claim 1, the transistors comprising thin-film transistors (TFTs).

6. A method for forming a single-surface touch sensor panel, comprising:

forming each of a plurality of distributed RC lines by alternating connected transistors and metal pads on a single surface of a sensor panel substrate, each transistor having drain and source terminals connected to adjacent metal pads;

arranging the plurality of distributed RC lines in an array of rows and columns;

applying non-overlapping first and second column gate signals to gate terminals of transistors on either side of each metal pad arranged in a column to alternately gate the transistors in each column on and off and provide an effective resistance for each column; and

applying non-overlapping first and second row gate signals to gate terminals of the transistors on either side of each metal pad arranged in a row to alternately gate the transistors in each row on and off and provide an effective resistance for each row.

7. The method of claim 6, further comprising adjusting a frequency of the first and second column gate signals or the first and second row gate signals to modify the effective resistance of the columns or rows.

8. The method of claim 6, further comprising adjusting a duty cycle of the first and second column gate signals or the first and second row gate signals to modify the effective resistance of the columns or rows.

9. The method of claim 6, the distributed RC lines formed on the single surface of the sensor panel substrate by printing techniques.

10. The method of claim 6, the transistors comprising thin-film transistors (TFTs).

11. A method for detecting one or more touches on a single-surface touch sensor panel having columns and rows of distributed RC lines formed from alternating transistors and metal pads on a single surface of a sensor panel substrate, comprising:

for every column,

applying non-overlapping first and second column gate signals to gate terminals of transistors on either side of each metal pad in the column to alternately gate the transistors in the column on and off and provide an effective resistance for the column,

disabling the transistors in all rows, and

sending a pulse top-to-bottom and then bottom-to-top through the column, measuring top-to-bottom and bottom-to-top pulse travel times through the column, and computing an equalized pulse travel time for that column as the sum of the top-to-bottom and bottom-to-top travel times;

for every row,

applying non-overlapping first and second row gate signals to gate terminals of the transistors on either side of each metal pad in the row to alternately gate the transistors in the row on and off and provide an effective resistance for the row,

disabling the transistors in all columns, and

sending a pulse left-to-right and then right-to-left through the row, measuring left-to-right and right-to-left pulse travel times through the row, and computing an equalized pulse travel time for that row as the sum of the left-to-right and right-to-left travel times; and

identifying the rows and columns having touches as those rows and columns having equalized pulse travel times greater than a no-touch equalized pulse travel time.

12. The method of claim 11, the steps of sending a pulse through the rows and columns comprising connecting drivers to the rows and columns and generating a pulse from the connected drivers, and connecting comparators to the rows and columns and detecting pulses received from the rows and columns at the connected comparators.

13. The method of claim 12, the steps of measuring pulse travel times comprising recording a first time when a pulse is generated by a driver and a second time when that pulse is detected by the comparator, and computing a difference between the first and second times.

14. The method of claim 11, further comprising disambiguating touch locations by:

for any two rows “

i” and

“

j”

at which a touch was detected,

making a first comparison as to whether the right-to-left pulse travel time for row “

i”

is greater than the right-to-left pulse travel time for row “

j”

,

making a second comparison as to whether the left-to-right pulse travel time for row “

i”

is greater than the left-to-right pulse travel time for row “

j”

,

determining that the touch at row “

i”

is in a column to a left of the touch at row “

j”

when the first comparison is true and the second comparison is false,

determining that the touch at row “

i”

is in a column to a right of the touch at row “

j”

when the first comparison is false and the second comparison is true, and

determining that the touch at row “

i”

is in the same column as the touch at row “

j”

when the first and second comparisons are false; and

for any two columns “

k” and

“

m”

at which a touch was detected,

making a third comparison as to whether the top-to-bottom pulse travel time for column “

k”

is greater than the top-to-bottom pulse travel time for column “

m”

,

making a fourth comparison as to whether the bottom-to-top pulse travel time for column “

k”

is greater than the bottom-to-top pulse travel time for column “

m”

,

determining that the touch at column “

k”

is in a row below the touch at column “

m”

when the third comparison is true and the fourth comparison is false,

determining that the touch at column “

k”

is in a row above the touch at column “

m”

when the third comparison is false and the fourth comparison is true, and

determining that the touch at column “

k”

is in the same row as the touch at column “

m”

when the third and fourth comparisons are false.

15. A non-transitory computer-readable medium comprising program code for detecting one or more touches on a single-surface touch sensor panel having columns and rows of distributed RC lines formed from alternating transistors and metal pads on a single surface of a sensor panel substrate, the program code for causing performance of a method comprising:

for every column,

applying non-overlapping first and second column gate signals to gate terminals of transistors on either side of each metal pad in the column to alternately gate the transistors in the column on and off and provide an effective resistance for the column,

disabling the transistors in all rows, and

sending a pulse top-to-bottom and then bottom-to-top through the column, measuring top-to-bottom and bottom-to-top pulse travel times through the column, and computing an equalized pulse travel time for that column as the sum of the top-to-bottom and bottom-to-top travel times;

for every row,

applying non-overlapping first and second row gate signals to gate terminals of the transistors on either side of each metal pad in the row to alternately gate the transistors in the row on and off and provide an effective resistance for the row,

disabling the transistors in all columns, and

sending a pulse left-to-right and then right-to-left through the row, measuring left-to-right and right-to-left pulse travel times through the row, and computing an equalized pulse travel time for that row as the sum of the left-to-right and right-to-left travel times; and

identifying the rows and columns having touches as those rows and columns having equalized pulse travel times greater than a no-touch equalized pulse travel time.

16. The computer-readable medium of claim 15, the steps of sending a pulse through the rows and columns comprising connecting drivers to the rows and columns and generating a pulse from the connected drivers, and connecting comparators to the rows and columns and detecting pulses received from the rows and columns at the connected comparators.

17. The computer-readable medium of claim 16, the steps of measuring pulse travel times comprising recording a first time when a pulse is generated by a driver and a second time when that pulse is detected by the comparator, and computing a difference between the first and second times.

18. The computer-readable medium of claim 15, the method further comprising disambiguating touch locations by:

for any two rows “

i” and

“

j”

at which a touch was detected,

making a first comparison as to whether the right-to-left pulse travel time for row “

i”

is greater than the right-to-left pulse travel time for row “

j”

,

making a second comparison as to whether the left-to-right pulse travel time for row “

i”

is greater than the left-to-right pulse travel time for row “

j”

,

determining that the touch at row “

i”

is in a column to a left of the touch at row “

j”

when the first comparison is true and the second comparison is false,

determining that the touch at row “

i”

is in a column to a right of the touch at row “

j”

when the first comparison is false and the second comparison is true, and

determining that the touch at row “

i”

is in the same column as the touch at row “

j”

when the first and second comparisons are false; and

for any two columns “

k” and

“

m”

at which a touch was detected,

making a third comparison as to whether the top-to-bottom pulse travel time for column “

k”

is greater than the top-to-bottom pulse travel time for column “

m”

,

making a fourth comparison as to whether the bottom-to-top pulse travel time for column “

k”

is greater than the bottom-to-top pulse travel time for column “

m”

,

determining that the touch at column “

k”

is in a row below the touch at column “

m”

when the third comparison is true and the fourth comparison is false,

determining that the touch at column “

k”

is in a row above the touch at column “

m”

when the third comparison is false and the fourth comparison is true, and

determining that the touch at column “

k”

is in the same row as the touch at column “

m”

when the third and fourth comparisons are false.

19. A computing device including a single-surface touch sensor panel, the single-surface touch sensor panel comprising:

a plurality of distributed RC lines arranged in an array of rows and columns, the distributed RC lines including alternating connected transistors and metal pads formed on a single surface of a sensor panel substrate, each transistor having drain and source terminals connected to adjacent metal pads;

first and second column gate signal lines connected to gate terminals of the transistors on either side of each metal pad arranged in a column; and

first and second row gate signal lines connected to the gate terminals of the transistors ion either side of each metal pad arranged in a row;

wherein the first and second column gate signal lines are configured for receiving non-overlapping first and second column gate signals to alternately gate the transistors in each column on and off and provide an effective resistance for each column; and

wherein the first and second row gate signal lines are configured for receiving non-overlapping first and second row gate signals to alternately gate the transistors in each row on and off and provide an effective resistance for each row.

20. A mobile telephone including the computing device of claim 19.

21. A digital audio player including the computing device of claim 19.