Integrated circuit with supply line intra-chip clock interface and methods for use therewith
First Claim
Patent Images
1. An integrated circuit comprising:
- a first circuit;
a plurality of first power supply lines for providing a first power to the first circuit; and
a first intra-chip clock interface coupled to the first power supply lines that generates a first clock signal on the first power supply lines;
a second circuit that operates based on the first clock signal;
a plurality of second power supply lines for coupling a second power to the second circuit;
a high-pass filter for coupling the plurality of first power supply lines to the plurality of second power supply lines, wherein the high-pass filter passes the first clock signal; and
a second intra-chip clock interface coupled to the second power supply lines that recovers the first clock signal from the second power supply lines.
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Abstract
An integrated circuit includes a first circuit and a plurality of first power supply lines for providing a first power to the first circuit. A first intra-chip clock interface generates a first clock signal on the first power supply lines. A plurality of second power supply lines are coupled to the plurality of first power supply lines and further couple a second power to the second circuit. A second intra-chip clock interface recovers the first clock signal from the second power supply lines. The second circuit operates based on the first clock signal.
9 Citations
18 Claims
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1. An integrated circuit comprising:
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a first circuit; a plurality of first power supply lines for providing a first power to the first circuit; and a first intra-chip clock interface coupled to the first power supply lines that generates a first clock signal on the first power supply lines; a second circuit that operates based on the first clock signal; a plurality of second power supply lines for coupling a second power to the second circuit; a high-pass filter for coupling the plurality of first power supply lines to the plurality of second power supply lines, wherein the high-pass filter passes the first clock signal; and a second intra-chip clock interface coupled to the second power supply lines that recovers the first clock signal from the second power supply lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An integrated circuit comprising:
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a first circuit; a plurality of first power supply lines for providing a first power to the first circuit; and a first intra-chip clock interface coupled to the first power supply lines that generates a first clock signal on the first power supply lines; a second circuit that operates based on the first clock signal; a plurality of second power supply lines, coupled to the plurality of first power supply lines for coupling a second power to the second circuit; and a second intra-chip clock interface coupled to the second power supply lines that recovers the first clock signal from the second power supply lines. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification