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Digital transmission circuit and interface providing selectable power consumption via multiple weighted driver slices

  • US 8,010,066 B2
  • Filed: 02/01/2008
  • Issued: 08/30/2011
  • Est. Priority Date: 02/03/2005
  • Status: Active Grant
First Claim
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1. A transmission circuit for transmitting a digital signal to one or more interface conductors, comprising:

  • a plurality of parallel driver slices each comprising a plurality of cascaded digital logic driver stages for receiving and sending binary-valued logic signals, wherein all of said slices have common output nodes at each stage, whereby a drive current at each particular stage is generated as the sum of unequal individual drive currents of each slice at each particular stage; and

    a control logic for selectively enabling said parallel driver slices, whereby a subset of said plurality of parallel drive slices can be enabled to select a power consumption and performance level.

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