In-line overlay measurement using charged particle beam system

• US 8,010,307 B2
• Filed: 12/05/2007
• Issued: 08/30/2011
• Est. Priority Date: 12/07/2006
• Status: Active Grant

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: Hermes Microvision, Inc. (ASML Holding NV)
• Inventors: Jau, Jack Y., Fang, Wei, Xiao, Hong
• Primary Examiner(s): Dunn; Drew A
• Assistant Examiner(s): VO, HIEN XUAN
• Application Number:
  US11/951,173
• Publication Number:
  US 20080215276A1
• Time in Patent Office: 1,364 Days
• Field of Search: 702/95, 702/84, 250/221, 250/548, 250/559.3, 356399-401, 356/237.5, 356/237.4
• US Class Current: 702/95
• CPC Class Codes: G03F 1/00 Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
• CPC Class Codes: G03F 7/70283 Mask effects on the imaging process
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Abstract

A method and system for controlling an overlay shift on an integrated circuit is disclosed. The method and system comprises utilizing a scanning electron microscope (SEM) to measure the overlay shift between a first mask and a second mask of the circuit after a second mask and comparing the overlay shift to information about the integrated circuit in a database. The method and system includes providing a control mechanism to analyze the overlay shift and feed forward to the fabrication process before a third mask for error correction. A system and method in accordance with the present invention advantageously utilizes a scanning electron microscope (SEM) image overlay measurement after the fabrication process such as etching and chemical mechanical polishing (CMP).

Claims

1. A method for controlling an overlay shift on an integrated circuit, the method comprising:

utilizing an scanning electron microscope (SEM) to measure the overlay shift between a first mask and a second mask of the integrated circuit after the second mask;

comparing the overlay shift to information about the integrated circuit in a database; and

providing a control mechanism to analyze the overlay shift and feed forward to the fabrication process before a third mask to adjust for error correction.

2. The method of claim 1, wherein database contains pattern images of operation steps.

3. The method of claim 1 wherein the database contains an average value of asymmetry of symmetric structure within the integrated circuit.

4. The method of claim 1 wherein the first mask is an active area mask, the second mask is a gate mask, and the third mask is a contact mask.

5. The method of claim 1 wherein the comparing is performed utilizing a plurality of overlay measurement algorithms.

6. The method of claim 4 wherein the contact mask is adjusted to reduce the risk of a contact-to-gate short.

7. A system for controlling an overlay shift on an integrated circuit, the method comprising:

means for utilizing a scanning electron microscope (SEM) to measure the overlay shift between a first and a second mask of the integrated circuit after the second mask;

means for comparing the overlay shift to information about the integrated circuit in a database; and

providing a control mechanism to analyze the overlay shift and feed forward to the fabrication process before a third mask to adjust for error correction.

8. The system of claim 7 wherein database contains pattern images of operation steps.

9. The system of claim 7 wherein the database contains an average value of asymmetry of symmetric structure within the integrated circuit.

10. The system of claim 7 wherein the first mask is an active area mask, the second mask is a gate mask, and the third mask is a contact mask.

11. The system of claim 7 wherein the means for comparing includes a means for utilizing a plurality of overlay measurement algorithms.

12. The system of claim 10 wherein the contact mask is adjusted to reduce the risk of a contact-to-gate short and/or striation.

13. A system for controlling an overlay shift on an integrated circuit, the system comprising:

a scanning electron microscope (SEM) to measure the overlay shift between a first and a second mask of the integrated circuit after a second mask; and

a processing system including a database, wherein the processing system compares the measured overlay shift to overlay shift information within the data base and provides a control mechanism to analyze the overlay shift and feed forward to the fabrication process before a third mask to adjust for error correction.