One-way transaction tagging in a switch crossbar

• US 8,010,618 B1
• Filed: 08/31/2006
• Issued: 08/30/2011
• Est. Priority Date: 08/08/2001
• Status: Active Grant

• Current Assignee: Zarbana Digital Fund LLC (Intellectual Ventures LLC)
• Original Assignee: Pasternak Solutions LLC (Intellectual Ventures LLC)
• Inventors: Purcell, Stephen Clark, Kimura, Scott
• Primary Examiner(s): Hamza; Faruk
• Application Number:
  US11/469,333
• Time in Patent Office: 1,825 Days
• Field of Search: 709/200, 709/203, 709211-213, 709/236, 709/238, 709/246, 370/355, 370/392, 370/428
• US Class Current: 709/213
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence

Abstract

A method and computer program product includes, at a sender, identifying a forward item including a transmit portion and a retain portion, generating a tag, associating the tag with the retain portion, sending the transmit portion, but not the tag, to a target; at the target, receiving the transmit portion, identifying a return portion corresponding to the transmit portion, independently generating the tag, associating the tag with the return portion, sending the return portion and the tag to the sender; and at the sender, receiving the return portion and the tag, identifying the retain portion using the tag, and associating the return portion with the retain portion to create a reverse item.

Claims

1. A system comprising a first switch, the first switch comprising:

means for receiving a memory transaction request sent from a source, the memory transaction request associated with a first tag identifying the memory transaction request with the source;

means for associating a second tag with the first tag at the first switch, the second tag identifying the memory transaction request with the first switch; and

means for sending the memory transaction request, but not the associated first and second tags, from the first switch to a first destination.

2. The system of claim 1, wherein the first switch further comprises:

means for receiving a memory transaction result and the second tag from the first destination;

means for matching the second tag corresponding to the memory transaction result received from the first destination with the associated first tag corresponding to the memory transaction request previously sent to the first destination by the first switch; and

means for sending the memory transaction result and the first tag from the first switch to the source.

3. The system of claim 1, wherein the first destination is a second switch, and wherein the second switch comprises:

means for independently generating the second tag at the second switch;

means for associating a third tag with the second tag at the second switch, the third tag identifying the memory transaction request with the second switch; and

means for sending the memory transaction request, but not the associated second or third tag, from the second switch to a second destination.

4. The system of claim 3, wherein the second switch further comprises:

means for receiving a memory transaction result and the third tag from the second destination;

means for matching the third tag corresponding to the memory transaction result received from the second destination with the associated second tag corresponding to the memory transaction request previously sent to the second destination by the second switch; and

means for sending the memory transaction result and the second tag to the first switch.

5. The system of claim 4, wherein the first switch further comprises:

means for receiving the memory transaction result and the second tag from the second switch;

means for matching the second tag corresponding to the memory transaction result received from the second switch with the associated first tag corresponding to the memory transaction request previously sent to the second switch by the first switch; and

means for sending the memory transaction result and the first tag from the first switch to the source.

6. A method comprising:

receiving, at a first switch, a memory transaction request sent from a source, the memory transaction request associated with a first tag identifying the memory transaction request with the source;

associating a second tag with the first tag at the first switch, the second tag identifying the memory transaction request with the first switch; and

sending the memory transaction request, but not the associated first and second tags, from the first switch to a first destination.

7. The method of claim 6, further comprising:

receiving a memory transaction result and the second tag from the first destination;

matching the second tag corresponding to the memory transaction result received from the first destination with the associated first tag corresponding to the memory transaction request previously sent to the first destination; and

sending the memory transaction result and the first tag from the first switch to the source.

8. The method of claim 6, wherein the first destination is a second switch, and wherein the method further comprises:

independently generating the same second tag in the second switch that was previously generated in the first switch but not sent to the second switch;

associating a third tag with the second tag in the second switch, the third tag identifying the memory transaction request with the second switch; and

sending the memory transaction request, but not the associated second or third tag, from the second switch to a second destination.

9. The method of claim 8, further comprising:

receiving a memory transaction result and the third tag from the second destination;

matching the third tag corresponding to the memory transaction result received from the second destination with the associated second tag corresponding to the memory transaction request previously sent to the second destination by the second switch; and

sending the memory transaction result and the second tag from the second switch to the first switch.

10. The method of claim 9, further comprising:

receiving the memory transaction result and the second tag at the first switch from the second switch;

matching the second tag associated with the memory transaction result received from the second switch with the first tag corresponding to the memory transaction request previously sent from the first switch to the second switch; and

sending the memory transaction result and the first tag from the first switch to the source.

11. A non-transitory tangible computer-readable medium having instructions stored thereon, the instructions comprising:

instructions for receiving, at a first switch, a memory transaction request sent from a source, the memory transaction request associated with a first tag identifying the memory transaction request with the source;

instructions for associating a second tag with the first tag at the first switch, the second tag identifying the memory transaction request with the first switch; and

instructions for sending the memory transaction request, but not the associated first and second tags, from the first switch to a first destination.

12. The non-transitory tangible computer-readable medium of claim 11, wherein the instructions further comprise:

instructions for receiving a memory transaction result and the second tag at the first switch from the first destination;

instructions for matching the second tag corresponding to the memory transaction result received from the first destination with the associated first tag corresponding to the memory transaction request previously sent from the first switch to the first destination; and

instructions for sending the memory transaction result and the first tag from the first switch to the source.

13. The non-transitory tangible computer-readable medium of claim 11, wherein the first destination is a second switch, and wherein the instructions further comprise:

instructions for independently generating the same second tag at the second switch that was previously generated in the first switch;

instructions for associating a third tag with the second tag at the second switch, the third tag identifying the memory transaction request with the second switch; and

instructions for sending the memory transaction request, but not the associated second or third tag, from the second switch to a second destination.

14. The non-transitory tangible computer-readable medium of claim 13, wherein the instructions further comprise:

instructions for receiving a memory transaction result and the third tag from the second destination;

instructions for matching the third tag corresponding to the memory transaction result received from the second destination with the associated second tag corresponding to the memory transaction request previously sent to the second destination by the second switch; and

instructions for sending the memory transaction result and the second tag from the second switch to the first switch.

15. The non-transitory tangible computer-readable medium of claim 14, wherein the instructions further comprise:

instructions for receiving the memory transaction result and the second tag at the first switch from the second switch;

instructions for matching the second tag associated with the memory transaction result received from the second switch with the first tag corresponding to the memory transaction request previously sent from the first switch to the second switch; and

instructions for sending the memory transaction result and the first tag from the first switch to the source.

16. A system comprising:

a first switching device configured to receive a plurality of memory transaction requests from a source, generate an inbound request tag corresponding to a received memory transaction request, generate an outbound request tag associated with the inbound request tag, and send the memory transaction request, but not the corresponding inbound or associated outbound request tags, from the first switching device to a destination; and

wherein the first switching device is further configured to receive a plurality of memory transaction results from the destination, wherein each memory transaction result comprises an outbound request tag corresponding to a memory transaction request previously sent from the first switching device to the destination, and wherein the first switching device is further configured to send the memory transaction result and the inbound request tag associated with the outbound request tag of the received memory transaction result from the first switching device to the source.

17. The system of claim 16, wherein the first switching device is one of a plurality of switching devices configured to provide a communications path between a plurality of processors and a plurality of memory devices.

18. The system of claim 16, wherein the first switching device is one of a plurality of center stage switching devices configured to provide a communications path between a plurality of first stage switching devices and a plurality of third stage switching devices, wherein the plurality of first stage switching devices are configured to provide a communications path between a plurality of processors and the plurality of center stage switching devices, and wherein the plurality of third stage switching devices are configured to provide a communications path between the plurality of center stage switching devices and a plurality of memory devices.