Digital-to-analog converter and method of digital-to-analog conversion
First Claim
1. A digital-to-analog converter (DAC) comprising:
- an analog gray voltage generation unit configured to generate a plurality of analog gray voltages;
a first decoder configured to select two different voltages of the plurality of the gray voltages as a first level voltage and a second level voltage, respectively, in response to an upper K-bits of N-bit input image data, N being an integer not less than two, K being an integer less than N;
a second decoder configured to repeatedly distribute the first level voltage and the second level voltage to output a plurality of distributed voltages in response to a lower L-bits of the N-bit input image data, L being equal to N subtracted by K, L being less than K; and
an interpolated voltage generation unit configured to generate an interpolated voltage based on the plurality of distributed voltages and as an average of the plurality of distributed voltages, wherein the interpolated voltage generation unit includes;
an amplifier;
a capacitor unit connected to an input terminal of the amplifier;
a first switching unit configured to selectively supply the plurality of distributed voltages to the capacitor unit;
a second switching unit configured to selectively connect an output terminal of the amplifier with the input terminal of the amplifier; and
a third switching unit configured to selectively connect the terminals of the capacitor unit and the output terminal of the amplifier.
1 Assignment
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Accused Products
Abstract
In one embodiment, the DAC includes an analog gray voltage generation unit configured to generate a plurality of analog gray voltages, and a first decoder configured to select two different voltages of the plurality of the gray voltages as a first level voltage and a second level voltage, respectively, in response to an upper K-bits of N-bit input image data. Here, N may be an integer not less than two, and K may be an integer less than N. A second decoder may be configured to repeatedly distribute the first level voltage and the second level voltage to output a plurality of distributed voltages in response to a lower L-bits of the N-bit input image data. Here, L may be equal to N subtracted by K, and L may be less than K. An interpolated voltage generation unit may be configured to generate an interpolated voltage based on the plurality of distributed voltages.
23 Citations
18 Claims
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1. A digital-to-analog converter (DAC) comprising:
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an analog gray voltage generation unit configured to generate a plurality of analog gray voltages; a first decoder configured to select two different voltages of the plurality of the gray voltages as a first level voltage and a second level voltage, respectively, in response to an upper K-bits of N-bit input image data, N being an integer not less than two, K being an integer less than N; a second decoder configured to repeatedly distribute the first level voltage and the second level voltage to output a plurality of distributed voltages in response to a lower L-bits of the N-bit input image data, L being equal to N subtracted by K, L being less than K; and an interpolated voltage generation unit configured to generate an interpolated voltage based on the plurality of distributed voltages and as an average of the plurality of distributed voltages, wherein the interpolated voltage generation unit includes; an amplifier; a capacitor unit connected to an input terminal of the amplifier; a first switching unit configured to selectively supply the plurality of distributed voltages to the capacitor unit; a second switching unit configured to selectively connect an output terminal of the amplifier with the input terminal of the amplifier; and a third switching unit configured to selectively connect the terminals of the capacitor unit and the output terminal of the amplifier. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of digital-to-analog (DA) conversion comprising:
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generating a plurality of analog gray voltages; selecting two different voltages of the plurality of the gray voltages as a first level voltage and a second level voltage in response to an upper K-bits of N-bit input image data, N being an integer not less than two, K being an integer less than N; distributing the first level voltage and the second level voltage repeatedly to generate a plurality of distributed voltages in response to a lower L-bits of the N-bit input image data, L being equal to N subtracted by K, and L being less than K; and averaging the plurality of distributed voltages to output an interpolated voltage, wherein averaging includes storing the plurality of distributed voltages in a capacitor unit as a configuration of charges, averaging the plurality of distributed voltages by short-circuiting capacitors included in the capacitor unit, outputting the average as the interpolated voltage, and for L=2, the distributing step is configured to output one of the following sets of four voltages as the plurality of distributed voltages;
(Vh, Vh, Vh, Vh), (Vh, Vh, Vh, V1), (Vh, Vh, V1, V1), (Vh, V1, V1, V1) in response to the lower 2-bits of the N-bit input image data, where Vh represents the first level voltage and V1 represents the second level voltage. - View Dependent Claims (16)
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17. A method of digital-to-analog (DA) conversion comprising:
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generating a plurality of analog gray voltages; selecting two different voltages of the plurality of the gray voltages as a first level voltage and a second level voltage in response to an upper K-bits of N-bit input image data, N being an integer not less than two, K being an integer less than N; distributing the first level voltage and the second level voltage repeatedly to generate a plurality of distributed voltages in response to a lower L-bits of the N-bit input image data, L being equal to N subtracted by K, and L being less than K; and averaging the plurality of distributed voltages to output an interpolated voltage, wherein averaging includes storing the plurality of distributed voltages in a capacitor unit as a configuration of charges, averaging the plurality of distributed voltages by short-circuiting capacitors included in the capacitor unit, outputting the average as the interpolated voltage, and for L=1, the distributing step is configured to output one of the following sets of two voltages as the plurality of distributed voltages;
(Vh, Vh), (Vh, V1) in response to the lower 1-bit of the N-bit input image data, where Vh represents the first level voltage and V1 represents the second level voltage. - View Dependent Claims (18)
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Specification