Method of manufacturing semiconductor active layer, method of manufacturing thin film transistor using the same and thin film transistor having semiconductor active layer

• US 8,017,513 B2
• Filed: 07/15/2008
• Issued: 09/13/2011
• Est. Priority Date: 07/16/2007
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Park, Jin-seong, Jeong, Jae-kyeong, Shin, Hyun-soo, Mo, Yeon-gon, Jeong, Jong-han, Ahn, Tae-kyung, Lee, Hun Jung, Kim, Min-kyu, Yang, Hui-won
• Primary Examiner(s): Pham; Thanh V
• Assistant Examiner(s): Payen; Marvin
• Application Number:
  US12/219,037
• Publication Number:
  US 20090020753A1
• Time in Patent Office: 1,155 Days
• Field of Search: 257/43, 257/E27.114, 257/E29.068, 438/104
• US Class Current: 438/604
• CPC Class Codes: C23C 14/086 of zinc, germanium, cadmium, indium, tin, thallium or bismuth
• CPC Class Codes: C23C 14/3464 using more than one target C23C14/56 takes precedence
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation

Abstract

A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the second target may be controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.

Claims

1. A method of manufacturing an IGZO active layer, the method comprising:

depositing ions including In, Ga, and Zn from a first target; and

depositing ions including In from a second target having a different atomic composition from the first target, the second target being made of InZnO, wherein the deposition of ions from the second target is controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.

2. The method as claimed in claim 1, wherein the atomic % of In in the IGZO layer is about 55 atomic % to about 75 atomic %.

3. The method as claimed in claim 1, wherein the atomic % of In in the IGZO layer is about 60 atomic % to about 70 atomic %.

4. The method as claimed in claim 1, wherein the first target includes In, Ga, and Zn in a molar ratio of about 1:

1;

1.

5. The method as claimed in claim 1, wherein the first target is made of InGaZnO.

6. The method as claimed in claim 5, wherein:

the first target includes In, Ga, and Zn in a molar ratio of about 1;

1;

1, and

the second target includes In and Zn in a molar ratio of about 1;

1 to about 6;

1 (In;

Zn).

7. The method as claimed in claim 1, wherein the atomic % of In in the IGZO layer is adjusted by adjusting a molar ratio of In:

Zn in the second target.

8. The method as claimed in claim 1, wherein first and second bias powers are applied to the first target and the second target, respectively, and the atomic % of In in the IGZO layer is adjusted by adjusting the intensity of the second bias power.

9. The method as claimed in claim 1, wherein the first target and the second target are irradiated with first and second pulsed lasers, and the atomic % of In in the IGZO layer is adjusted by adjusting the intensity of the second pulsed laser.

10. A method of manufacturing a thin film transistor, the method comprising:

forming an IGZO active layer on a substrate;

forming a gate electrode spaced apart from the IGZO active layer by a gate dielectric layer;

forming a source electrode that contacts a first portion of the IGZO active layer; and

forming a drain electrode that contacts a second portion of the IGZO active layer, wherein forming the IGZO active layer includes;

depositing ions including In, Ga, and Zn from a first target, and

depositing ions including In from a second target having a different atomic composition from the first target, the second target being made of InZnO, the deposition of ions from the second target being controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.

11. The method as claimed in claim 10, wherein the atomic % of In in the IGZO layer is about 55 atomic % to about 75 atomic %.

12. The method as claimed in claim 10, wherein the atomic % of In in the IGZO layer is about 60 atomic % to about 70 atomic %.

13. The method as claimed in claim 10, wherein the first target includes In, Ga, and Zn in a molar ratio of about 1:

1;

1.

14. The method as claimed in claim 10, wherein the first target is made of InGaZnO.

15. The method as claimed in claim 14, wherein:

the first target includes In, Ga, and Zn in a molar ratio of about 1;

1;

1, and

the second target includes In and Zn in a molar ratio of about 1;

1 to about 6;

1 (In;

Zn).

16. The method as claimed in claim 10, wherein the atomic % of In in the IGZO layer is adjusted by adjusting a molar ratio of In:

Zn in the second target.

17. The method as claimed in claim 10, wherein first and second bias powers are applied to the first target and the second target, respectively, and the atomic % of In in the IGZO layer is adjusted by adjusting the intensity of the second bias power.

18. The method as claimed in claim 10, wherein the first target and the second target are irradiated with first and second pulsed lasers, and the atomic % of In in the IGZO layer is adjusted by adjusting the intensity of the second pulsed laser.

19. The method as claimed in claim 10, wherein:

the gate dielectric layer is on the gate electrode such that the gate electrode is between the gate dielectric layer and the substrate, and

the IGZO active layer is on the gate dielectric layer.

20. The method as claimed in claim 10, wherein:

the gate dielectric layer is on the IGZO active layer such that the IGZO active layer is between the gate dielectric layer and the substrate, and

the gate electrode is on the gate dielectric layer.