Multi-function duty cycle modifier

• US 8,018,171 B1
• Filed: 03/12/2008
• Issued: 09/13/2011
• Est. Priority Date: 03/12/2007
• Status: Expired due to Fees

• Current Assignee: Signify Holding B.V. (Signify N.V.)
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Paulos, John J., Melanson, John L.
• Primary Examiner(s): Vu; David Hung
• Application Number:
  US12/047,258
• Time in Patent Office: 1,280 Days
• Field of Search: 315/246, 315/250, 315/194, 315/195, 315/199, 315/291, 315/295, 315/DIG.4
• US Class Current: 315/194
• CPC Class Codes: H05B 45/3725 Switched mode power supply [SMPS]
• CPC Class Codes: Y10S 315/04 Dimming circuit for fluorescent lamps

Abstract

A system and method modify phase delays of a periodic, phase modulated mains voltage to generate at least two independent items of information during each cycle of the periodic input signal. The independent items of information can be generated by, for example, independently modifying leading edge and trailing edge phase delays of each half cycle phase modulated mains voltage. Modifying phase delays for the leading and trailing edges of each half cycle of the phase modulated mains voltage can generate up to four independent items of data. The items of data can be converted into independent control signals to, for example, control drive currents to respective output devices such as light sources to provide multiple items of information per cycle.

Claims

1. An apparatus to generate at least two independent signals in response to at least two independent items of information derived from at least two independently generated phase delays per cycle of a phase modulated mains voltage signal, the apparatus comprising:

a phase delay detector to detect at least two independently generated phase delays per cycle of the phase modulated mains voltage signal and to generate respective data signals, wherein each data signal represents an item of information conforming to one of the phase delays; and

a controller, coupled to the phase delay detector, to receive the data signals and, for each received data signal, to generate a control signal in conformity with the item of information represented by the data signal.

2. The apparatus of claim 1 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles, and the leading edge phase delays represent independent items of information.

3. The apparatus of claim 1 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes trailing edge phase delays for the first and second half cycles, and the trailing edge phase delays represent independent items of information.

4. The apparatus of claim 1 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles and trailing edge phase delays for the first and second half cycles, wherein each leading edge phase delay and each trailing edge phase delay represent independent items of information.

5. The apparatus of claim 1 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles and trailing edge phase delays for the first and second half cycles, wherein the leading edge phase delays represent a first item of information and the trailing edge phase delays represent a second item of information that is independent of the first item of information.

6. The apparatus of claim 1 further comprising:

a light emitting diode (LED) driver, coupled to the controller, to receive each duty cycle modulated control signal and, for each received control signal, to generate an approximately constant LED drive current having a direct current (DC) offset that is proportional to the duty cycle of the duty cycle modulated control signal.

7. The apparatus of claim 6 further comprising:

a first LED set of at least one light emitting diodes (LEDs) coupled to the LED driver; and

a second LED set of at least one LEDs coupled to the LED driver.

8. The apparatus of claim 1 wherein the phase modulated mains voltage signal is a phase modulated dimming signal.

9. A method to generate at least two independent signals in response to at least two independent items of information derived from at least two independently generated phase delays per cycle of a phase modulated mains voltage signal, the method comprising:

detecting at least two independent phase delays per cycle of the phase modulated mains voltage signal, wherein each phase delay represents an independent item of information;

generating respective data signals, wherein each data signal represents an item of information conforming to one of the phase delays; and

for each data signal, generating a control signal in conformity with the item of information represented by the data signal.

10. The method of claim 9 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles, and the leading edge phase delays represent independent items of information.

11. The method of claim 9 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes trailing edge phase delays for the first and second half cycles, and the trailing edge phase delays represent independent items of information.

12. The method of claim 9 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles and trailing edge phase delays for the first and second half cycles, wherein each leading edge phase delay and each trailing edge phase delay represent independent items of information.

13. The method of claim 9 wherein each cycle of the phase modulated mains voltage signal includes a first half cycle and a second half cycle, the phase modulated mains voltage signal includes leading edge phase delays for the first and second half cycles and trailing edge phase delays for the first and second half cycles, wherein the leading edge phase delays represent a first item of information and the trailing edge phase delays represent a second item of information that is independent of the first item of information.

14. The method of claim 9 further comprising:

receiving each duty cycle modulated control signal; and

for each received control signal, generating an approximately constant LED drive current having a direct current (DC) offset that is proportional to the duty cycle of the duty cycle modulated control signal.

15. The method of claim 14 wherein generating an approximately constant LED drive current having a direct current (DC) offset that is proportional to the duty cycle of the duty cycle modulated control signal comprises generating first and second approximately constant LED drive currents, the method further comprising:

providing the first LED drive current to a first LED set of at least one light emitting diodes (LEDs) coupled to the LED driver; and

providing the second LED drive current to a second LED set of at least one LEDs coupled to the LED driver.

16. The method of claim 9 wherein the phase modulated mains voltage signal is a phase modulated dimming signal.