Method and housing for memory module including battery backup

• US 8,018,729 B2
• Filed: 02/19/2008
• Issued: 09/13/2011
• Est. Priority Date: 02/19/2008
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Skinner, Brian
• Primary Examiner(s): Lee; Jinhee
• Assistant Examiner(s): Wilson; Adrian S
• Application Number:
  US12/070,431
• Publication Number:
  US 20090231798A1
• Time in Patent Office: 1,302 Days
• Field of Search: 361/679.32, 361/785, 361/809, 361/679.02, 361/679.31, 361/679.58, 361/760, 361/784
• US Class Current: 361/760
• CPC Class Codes: G06F 1/185 Mounting of expansion boards
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

A device may include protective housing including a battery backup unit circuit, at least one L-hook disposed on the protective housing including a battery backup unit circuit, the L-hook configured for being coupled to a test point loop disposed on a memory module, and/or at least one retention arm configured to couple the protective housing including a battery backup unit circuit to the memory module. Additionally, a RAID controller card and a method utilizing the device are disclosed.

Claims

1. A device, comprising:

a protective housing including a battery backup unit circuit;

at least one L-hook disposed on the protective housing including a battery backup unit circuit, the L-hook configured for being coupled to a test point loop, the test point loop coupled to an integrated circuit and disposed on a memory module; and

at least one retention arm configured to couple the protective housing including a battery backup unit circuit to the memory module, the at least one retention arm including a retention bump configured to fit within a notch of the memory module.

2. The memory module in claim 1, wherein the protective housing including a battery backup unit circuit comprises:

a polymer.

3. The memory module in claim 1, wherein the protective housing including a battery backup unit circuit comprises:

a smart battery system.

4. The memory module in claim 1, wherein the protective housing including a battery backup unit circuit comprises:

a lithium-ion polymer battery.

5. The memory module in claim 1, wherein the at least one L-hook disposed on the protective housing including a battery backup unit circuit, the L-hook configured for being coupled to a test point loop, the test point loop coupled to an integrated circuit and disposed on a memory module comprises:

a dual in-line memory module (DIMM).

6. The memory module in claim 1, wherein the at least one L-hook disposed on the protective housing including a battery backup unit circuit, the L-hook configured for being coupled to a test point loop, the test point loop coupled to an integrated circuit and disposed on a memory module comprises:

a memory module including a printed circuit board with a first edge approximately 3.2 inches and a second edge approximately 1.7 inches.

7. A RAID controller card, comprising:

a base card including a memory module socket; and

a memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module; and

at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit.

8. The RAID controller card in claim 7, wherein the base card including a memory module socket comprises:

a low profile serial attached SCSI (SAS) RAID card.

9. The RAID controller card in claim 7, wherein the memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module;

and at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit comprises;

a dual in-line memory module (DIMM).

10. The RAID controller card in claim 7, wherein the memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module;

and at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit comprises;

a printed circuit board with a first edge approximately 3.2 inches and a second edge approximately 1.7 inches.

11. The RAID controller card in claim 7, wherein the memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module;

and at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit comprises;

a smart battery system.

12. The RAID controller card in claim 7, wherein the memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module;

and at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit comprises;

a lithium-ion polymer battery.

13. The RAID controller card in claim 7, wherein the memory module including a printed circuit board, at least one integrated circuit, at least one test point loop, a protective housing including a battery backup circuit, at least one retention arm, the at least one retention arm coupled to a side of said protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the memory module;

and at least one L-hook configured for being coupled to the at least one test point loop, the at least one test point loop coupled to said at least one integrated circuit and disposed on said printed circuit board, the L-hook disposed on the protective housing including a battery backup circuit comprises;

a polymer cell.

14. A method, comprising:

arranging at least one integrated circuit on a printed circuit board; and

arranging at least one protective housing including a battery backup unit circuit on the printed circuit board by utilizing at least one L-hook configured for coupling to at least one test point loop, the at least one test point loop coupled to the at least one integrated circuit and disposed on the printed circuit board, and at least one retention arm, the at least one retention arm coupled to a side of said at least one protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the printed circuit board.

15. The method in claim 14, wherein arranging at least one integrated circuit on a printed circuit board comprises:

arranging at least one integrated circuit on a dual in-line memory module (DIMM).

16. The method in claim 14, wherein arranging at least one protective housing including a battery backup unit circuit on the printed circuit board by utilizing at least one L-hook configured for coupling to at least one test point loop, the at least one test point loop coupled to the at least one integrated circuit and disposed on the printed circuit board, and at least one retention arm, the at least one retention arm coupled to a side of said at least one protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the printed circuit board comprises:

utilizing a smart battery system.

17. The method in claim 14, wherein arranging at least one protective housing including a battery backup unit circuit on the printed circuit board by utilizing at least one L-hook configured for coupling to at least one test point loop, the at least one test point loop coupled to the at least one integrated circuit and disposed on the printed circuit board, and at least one retention arm, the at least one retention arm coupled to a side of said at least one protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the printed circuit board comprises:

utilizing a lithium-ion polymer battery.

18. The method in claim 14, wherein arranging at least one protective housing including a battery backup unit circuit on the printed circuit board by utilizing at least one L-hook configured for coupling to at least one test point loop, the at least one test point loop coupled to the at least one integrated circuit and disposed on the printed circuit board, and at least one retention arm, the at least one retention arm coupled to a side of said at least one protective housing, the at least one retention arm including a retention bump configured to fit within a notch of the printed circuit board comprises:

utilizing a protective polymer housing.

19. The method in claim 14, further comprising:

integrating the printed circuit board with a RAID controller card.