Calibration techniques for frequency synthesizers

• US 8,019,301 B2
• Filed: 06/17/2008
• Issued: 09/13/2011
• Est. Priority Date: 03/06/2002
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Dunworth, Jeremy D., Walker, Brett C.
• Primary Examiner(s): WEST, LEWIS G
• Application Number:
  US12/140,523
• Publication Number:
  US 20080248771A1
• Time in Patent Office: 1,183 Days
• Field of Search: 455/258, 455/260, 455/76, 455/118, 455/323
• US Class Current: 455/260
• CPC Class Codes: H03L 7/0898 the source or sink current values being variable H03L7/0896 takes precedence
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/113 using frequency discriminator
• CPC Class Codes: H03L 7/199 with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Abstract

In one embodiment, this disclosure describes a frequency synthesizer for use in a wireless communication device, or similar device that requires precision frequency synthesis but small amounts of noise. In particular, the frequency synthesizer may include a phase locked loop (PLL) and an integrated voltage controlled oscillator (VCO). The frequency synthesizer may implement one or more calibration techniques to quickly and precisely calibrate the VCO. In this manner, the analog gain of the VCO can be significantly reduced, which may improve performance of the wireless communication device. Also, the initial state of the PLL may be improved to reduce lock time of the PLL, which may enhance performance of the wireless communication device.

Claims

1. A frequency synthesizer comprising:

an oscillator including configurable circuitry that defines an initial frequency of the oscillator for an initial input parameter;

a first divider that generates a signal indicative of the oscillator by scaling an oscillator frequency defined by the initial input parameter;

a second divider that generates a signal indicative of a reference by scaling a reference frequency; and

a calibration unit coupled directly to the first and second dividers, the calibration unit being configured to adjust the configurable circuitry based on a comparison of the signal indicative of the oscillator and the signal indicative of the reference, wherein the calibration unit initializes the signals indicative of the oscillator and the reference so that the signals are substantially in phase.

2. The frequency synthesizer of claim 1, wherein the oscillator comprises a voltage controlled oscillator and the initial input parameter is an initial input voltage, and wherein the configurable circuitry comprises a number of switched capacitors, wherein the calibration unit adjusts the configurable circuitry by activating a subset of the switched capacitors based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

3. The frequency synthesizer of claim 2, further comprising circuitry that generates the initial input voltage based on temperature.

4. The frequency synthesizer of claim 1, wherein the calibration unit initializes the first and second dividers at approximately the same time to initialize signals indicative of the oscillator and the reference so that the signals are substantially in phase.

5. The frequency synthesizer of claim 1, further comprising a phase locked loop that provides analog control of the oscillator following calibration.

6. The frequency synthesizer of claim 5, wherein the phase locked loop and the oscillator are integrated as integrated circuitry, wherein the dividers used for scaling of the reference and oscillator frequencies are also used in the phase locked loop.

7. The frequency synthesizer of claim 5, wherein the oscillator is a voltage controlled oscillator, and wherein the phase locked loop includes a charge pump that generates input voltages for the voltage controlled oscillator after calibration based on a comparison of the signal indicative of the oscillator and the frequency indicative of a reference.

8. A frequency synthesizer comprising:

an oscillator including configurable circuitry that defines an initial frequency of the oscillator for an initial input parameter;

a first divider means that generates a signal indicative of the oscillator by scaling an oscillator frequency defined by the initial input parameter;

a second divider means that generates a signal indicative of a reference by scaling a reference frequency; and

means for adjusting the configurable circuitry based on a comparison of the signal indicative of the oscillator and the signal indicative of a reference, wherein the means for adjusting initializes the signals indicative of the oscillator and the reference so that the signals are substantially in phase and is coupled directly to the first and second divider means.

9. The frequency synthesizer of claim 8, wherein the oscillator comprises a voltage controlled oscillator and the initial input parameter is an initial input voltage, and wherein the configurable circuitry comprises a number of switched capacitors, wherein the means for adjusting adjusts the configurable circuitry by activating a subset of the switched capacitors based on the comparison of the signal indicative of the oscillator and a signal indicative of the reference.

10. The frequency synthesizer of claim 9, further comprising means for generating the initial input voltage based on temperature.

11. The frequency synthesizer of claim 8, wherein the means for adjusting initializes the signals indicative of the oscillator and the reference by initializing a divider circuit for initial frequency of the oscillator and a divider circuit for the reference frequency at approximately the same time.

12. The frequency synthesizer of claim 8, further comprising means for analog control of the oscillator following calibration.

13. The frequency synthesizer of claim 12, wherein the means for analog control and the oscillator are integrated as integrated circuitry.

14. The frequency synthesizer of claim 12, wherein the oscillator is a voltage controlled oscillator, and wherein the means for analog control includes a means for generating input voltages for the voltage controlled oscillator after calibration based on a comparison of the signal indicative of the oscillator and the signal indicative of a reference.

15. A method for calibrating a frequency synthesizer comprising:

defining an initial frequency of an oscillator for an initial input parameter;

initializing a first divider and a second divider by sending a signal from a calibration unit to each of the first and second dividers;

generating, in the first divider, a signal indicative of the oscillator by scaling an oscillator frequency defined by the initial input parameter;

generating, in the second divider, a signal indicative a reference by scaling a reference frequency;

comparing the signal indicative of the oscillator and the signal indicative of the reference in the calibration unit; and

adjusting configurable circuitry connected to the oscillator based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

16. The method of claim 15, wherein adjusting configurable circuitry comprises activating a subset of switched capacitors based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

17. The method of claim 15, wherein the initial input parameter is an initial input voltage, the method further comprising:

generating the initial input voltage based on temperature.

18. The method of claim 15, wherein initializing the first divider and the second divider comprises initializing the signal indicative of the oscillator and the signal indicative of the reference such that the signal indicative of the oscillator and the signal indicative of the reference are substantially in phase.

19. The method of claim 18, wherein initializing the first divider and the second divider comprises initializing the signal indicative of the oscillator and the signal indicative of the reference at approximately the same time.

20. An apparatus for calibrating a frequency synthesizer comprising:

means for defining an initial frequency of an oscillator for an initial input parameter;

means for initializing a first divider and a second divider by sending a signal from a calibration unit to each of the first and second dividers;

means for generating, in the first divider, a signal indicative of the oscillator by scaling an oscillator frequency defined by the initial input parameter;

means for generating, in the second divider, a signal indicative a reference by scaling a reference frequency;

means for comparing the signal indicative of the oscillator and the signal indicative of the reference in the calibration unit; and

means for adjusting configurable circuitry connected to the oscillator based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

21. The apparatus of claim 20, wherein means for adjusting configurable circuitry comprises means for activating a subset of switched capacitors based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

22. The apparatus of claim 20, wherein the initial input parameter is an initial input voltage, the apparatus further comprising:

means for generating the initial input voltage based on temperature.

23. The apparatus of claim 20, wherein means for initializing the first divider and the second divider comprises means for initializing the signal indicative of the oscillator and the signal indicative of the reference such that the signal indicative of the oscillator and the signal indicative of the reference are substantially in phase.

24. The method of claim 23, wherein means for initializing the first divider and the second divider further comprises means for initializing the signal indicative of the oscillator and the signal indicative of the reference at approximately the same time.

25. A non-transitory computer readable storage medium having stored thereon processor-executable software instructions configured to cause a processor to perform operations for calibrating a frequency synthesizer, the operations comprising:

defining an initial frequency of an oscillator for an initial input parameter;

initializing a first divider and a second divider by sending a signal from a calibration unit to each of the first and second dividers;

generating, in the first divider, a signal indicative of the oscillator by scaling an oscillator frequency defined by the initial input parameter;

generating, in the second divider, a signal indicative a reference by scaling a reference frequency;

comparing the signal indicative of the oscillator and the signal indicative of the reference in the calibration unit; and

adjusting configurable circuitry connected to the oscillator based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

26. The non-transitory computer readable storage medium of claim 25, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising activating a subset of switched capacitors based on the comparison of the signal indicative of the oscillator and the signal indicative of the reference.

27. The non-transitory computer readable storage medium of claim 25, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising:

generating the initial input voltage based on temperature.

28. The non-transitory computer readable storage medium of claim 25, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising initializing the signal indicative of the oscillator and the signal indicative of the reference such that the signal indicative of the oscillator and the signal indicative of the reference are substantially in phase.

29. The method of claim 28, wherein the stored processor-executable software instructions are configured to cause a processor to perform operations further comprising initializing the signal indicative of the oscillator and the signal indicative of the reference at approximately the same time.