Apparatus, system, and method for solid-state storage as cache for high-capacity, non-volatile storage

• US 8,019,938 B2
• Filed: 12/06/2007
• Issued: 09/13/2011
• Est. Priority Date: 12/06/2006
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Fusion-IO Incorporated (Western Digital Corporation)
• Inventors: Flynn, David, Thatcher, Jonathan, Zappe, Michael, Strasser, John
• Primary Examiner(s): Thomas; Shane M
• Assistant Examiner(s): Fishburn; John P
• Application Number:
  US11/952,123
• Publication Number:
  US 20090132760A1
• Time in Patent Office: 1,377 Days
• Field of Search: None
• US Class Current: 711/113
• CPC Class Codes: G06F 1/183 Internal mounting support structures, e.g. for printed circuit boards, internal connecting means for buses G06F13/409
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0868 Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
• CPC Class Codes: G06F 12/12 Replacement control
• CPC Class Codes: G06F 12/121 using replacement algorithms
• CPC Class Codes: G06F 12/123 with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/426 using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus
• CPC Class Codes: G06F 2211/002 Bus
• CPC Class Codes: G06F 2211/103 Hybrid, i.e. RAID systems with parity comprising a mix of RAID types
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/1044 Space efficiency improvement
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: G06F 2212/222 Non-volatile memory
• CPC Class Codes: G06F 2212/70 Details relating to dynamic memory management
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7208 : Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0604 : Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0608 : Saving storage space on storage systems
• CPC Class Codes: G06F 3/0613 : in relation to throughput
• CPC Class Codes: G06F 3/0619 : in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0643 : Management of files
• CPC Class Codes: G06F 3/065 : Replication mechanisms
• CPC Class Codes: G06F 3/0652 : Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
• CPC Class Codes: G06F 3/0656 : Data buffering arrangements
• CPC Class Codes: G06F 3/0659 : Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 : Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/0685 : Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 3/0688 : Non-volatile semiconductor memory arrays
• CPC Class Codes: G06F 9/52 : Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• CPC Class Codes: G06F 9/54 : Interprogram communication
• CPC Class Codes: H04L 67/02 : based on web technology, e.g. hypertext transfer protocol [HTTP]
• CPC Class Codes: H04L 67/1097 : for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
• CPC Class Codes: H05K 7/1444 : Complex or three-dimensional-arrangements; Stepped or dual mother boards
• CPC Class Codes: H05K 7/1487 : Blade assemblies, e.g. blade cases or inner arrangements within a blade
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An apparatus, system, and method are disclosed for solid-state storage as cache for high-capacity, non-volatile storage. The apparatus, system, and method are provided with a plurality of modules including a cache front-end module and a cache back-end module. The cache front-end module manages data transfers associated with a storage request. The data transfers between a requesting device and solid-state storage function as cache for one or more HCNV storage devices, and the data transfers may include one or more of data, metadata, and metadata indexes. The solid-state storage may include an array of non-volatile, solid-state data storage elements. The cache back-end module manages data transfers between the solid-state storage and the one or more HCNV storage devices.

Claims

1. An apparatus for managing the storage of data on one or more high capacity, non-volatile (“

HCNV”

) storage devices, the apparatus comprising;

a cache front-end module that manages data transfers associated with a storage request, the data transfers between a requesting device and a solid-state storage device functioning as a cache for one or more HCNV storage devices, the solid-state storage device comprising an array of non-volatile, solid-state storage elements;

a cache back-end module that manages data transfers between the solid-state storage device and the one or more HCNV storage devices; and

a sequential storage module that temporally orders data sent to the cache within a storage division of the solid-state storage device, the sequential storage module ordering the data sequentially by order of processing, the sequential storage module further managing a temporal order of storage divisions by way of a sequential order for storage divisions.

2. The apparatus of claim 1, further comprising an error correcting code (ECC) generator configured to:

generate an ECC block comprising at least a portion of data associated with the data transfer and an ECC capable of correcting an error in the ECC block; and

storing a first portion of the ECC block on a first solid-state storage element and a second portion of the ECC block on a second solid-state storage element.

3. The apparatus of claim 2, wherein storing the first portion of the ECC block and storing the second portion of the ECC block comprises storing the first portion of the ECC block on a page of the first solid-state storage element and the second portion of the ECC block on a page of the second solid-state storage element.

4. The apparatus of claim 3, wherein a length of the ECC is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a block size of data received from the requesting device.

5. The apparatus of claim 3, wherein a length of the ECC is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a physical page size of the solid state storage elements.

6. The apparatus of claim 2, further comprising a packetizer configured to packetize data into one or more packets, wherein the ECC block comprises at least a portion of at least one of the packets, the ECC block having no fixed relationship between a size of the packets and a size of the ECC block.

7. The apparatus of claim 6, wherein the apparatus is configured to:

select a storage division of the solid-state storage device for recovery by identifying that the storage division contains a high amount of invalid data; and

queue valid data packets within the storage division with other data packets to be written sequentially to the solid-state storage device.

8. The apparatus of claim 1, comprising an object storage controller module that services object requests from one or more requesting devices and manages objects of the object requests within the solid-state storage device.

9. The apparatus of claim 1, further comprising an HCNV RAID module that stores data cached in the solid-state storage device in two or more HCNV storage devices in redundant array of independent drives (“

RAID”

) consistent with a RAID level.

10. The apparatus of claim 1, wherein the solid-state storage device and the one or more HCNV storage device comprise a hybrid storage device within a hybrid storage devices set that is configured as a RAID group, wherein a data segment cached in the solid-state storage device and later stored on an HCNV device comprises one of N data segments of a stripe or a parity data segment of the stripe, wherein the hybrid storage device receives storage requests from one or more clients independent of data segments of a RAID stripe.

11. The apparatus of claim 1, wherein a write data pipeline accesses solid-state storage elements in the array of non-volatile solid-state storage elements in parallel via a bus.

12. The apparatus of claim 1, wherein the solid-state storage device and the one or more HCNV storage devices comprise a hybrid storage device and further comprising a standard device emulation module that provides access to the hybrid storage device by emulating a standard device attached to one or more requesting devices prior to loading the one or more requesting devices with code specific to the operation of the hybrid storage device, the standard device being supported by an industry standard BIOS.

13. The apparatus of claim 1, wherein the solid-state storage device may be partitioned into two or more partitions, wherein one or more partitions may be used as solid-state storage independent of the solid-state storage device functioning as cache for the HCNV storage devices.

14. The apparatus of claim 1, wherein one or more clients send cache control message to the cache front end module and the cache back end module, the cache control messages comprising one or more of:

a control message that causes the cache back-end module to pin a portion of an object or file in the solid-state storage device;

a control message that causes the cache back-end module to unpin a portion of an object or file in the solid-state storage device;

a control message that causes the cache back-end module to flush a portion of an object or file from the solid-state storage device to the one or more HCNV storage devices;

a control message that causes the cache back-end module to preload a portion of an object or file to the solid-state storage device from the one or more HCNV storage devices; and

a control message that causes the cache back-end module to offload one or more portions of one or more objects or files from the solid-state storage device to the one or more HCNV storage devices in order to free up a determined amount of storage space in the solid-state storage device.

15. The apparatus of claim 7, wherein the cache control messages are communicated through metadata (“

cache control metadata”

) for the data transfer.

16. The apparatus of claim 15, wherein the cache control metadata is persistent.

17. The apparatus of claim 1, further comprising a volatile cache storage element and wherein the cache front-end module and the cache back-end module further comprise storing data in the volatile cache storage element and manage data stored in the solid-state storage device and volatile cache storage element and wherein the back-end storage module further manages data transfers between the volatile cache storage element, the solid state storage, and the HCVN storage devices.

18. The apparatus of claim 1, wherein one or more of metadata and index metadata for objects and files stored in the HCNV storage devices is maintained within the solid-state storage device.

19. A system for managing the storage of data on one or more high capacity, non-volatile (“

HCNV”

) storage devices, the system comprising;

a solid-state storage device comprising an array of non-volatile, solid-state storage elements;

one or more HCNV storage devices; and

a storage controller comprising

a solid-state storage controller;

an HCNV storage device controller;

a cache front-end module that manages data transfers associated with a storage request, the data transfers between a requesting device and the solid-state storage device functioning as cache for the one or more HCNV storage devices;

a cache back-end module that manages data transfers between the solid-state storage device and the one or more HCNV storage devices; and

a sequential storage module that temporally orders data sent to the cache within a storage division of the solid-state storage device, the sequential storage module ordering the data sequentially by order of processing, the sequential storage module further managing a temporal order of storage divisions by way of a sequential order for storage divisions.

20. The system of claim 19, further comprising a network interface connected to the storage controller, the network interface facilitating data transfers between the requesting device and the solid-state storage controller through a computer network.

21. The system of claim 19, further comprising a server, wherein the server includes the solid-state storage device, the one or more HCNV storage devices, and the storage controller.

22. The system of claim 19, wherein the one or more HCNV storage devices are connected to the storage controller through a storage area network (“

SAN”

).

23. A computer program product comprising a computer readable medium having computer usable program code executable to perform operations for managing the storage of data on one or more high capacity, non-volatile (“

HCNV”

) storage devices, the operations of the computer program product comprising;

managing data transfers associated with a storage request, the data transfers between a requesting device and solid-state storage device functioning as cache for one or more HCNV storage devices, the solid-state storage device comprising an array of non-volatile, solid-state storage elements;

managing data transfers between the solid-state storage device and the one or more HCNV storage devices; and

temporally ordering data sent to the cache within a storage division of the solid-state storage device, wherein temporal ordering is sequential by order of processing;

managing a temporal order of storage divisions by way of a sequential order for storage divisions.

24. A method for managing the storage of data on one or more high capacity, non-volatile (“

HCNV”

) storage devices, the method comprising;

managing data transfers associated with a storage request, the data transfers between a requesting device and a solid-state storage device functioning as cache for one or more HCNV storage devices, the solid-state storage device comprising an array of non-volatile, solid-state storage elements;

managing data transfers between the solid-state storage device and the one or more HCNV storage devices; and

temporally ordering data sent to the cache within a storage division of the solid-state storage device, wherein temporal ordering is sequential sequentially by order of processing;

managing a temporal order of storage divisions by way of a sequential order for storage divisions.

25. The method of claim 24, further comprising:

generating an ECC block comprising at least a portion of data associated with the data transfer and an ECC capable of correcting an error in the ECC block; and

storing a first portion of the ECC block on a first solid-state storage element and a second portion of the ECC block on a second solid-state storage element.

26. The method of claim 25, wherein storing the first portion of the ECC block and storing the second portion of the ECC block comprises storing the first portion of the ECC block on a page of the first solid-state storage element and the second portion of the ECC block on a page of the second solid-state storage element.

27. The method of claim 26, wherein a length of the ECC is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a block size of data received from the requesting device.

28. The method of claim 26, wherein a length of the ECC is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a physical page size of the solid state storage elements.

29. The method of claim 25, further comprising packetizing data into one or more packets, wherein the ECC block comprises at least a portion of at least one of the packets, the ECC block having no fixed relationship between a size of the packets and a size of the ECC block.

30. The method of claim 29, further comprising:

selecting a storage division of the solid-state storage device for recovery by identifying that the storage division contains a high amount of invalid data; and

queuing valid data packets within the storage division with other data packets to be written sequentially to the solid-state storage device.