Method of joining chips utilizing copper pillar
First Claim
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1. A method for fabricating a chip package, comprising:
- providing a copper pillar on a chip and a first tin-containing layer over said copper pillar, wherein said first tin-containing layer has a thickness less than a thickness of said copper pillar;
providing a second tin-containing layer on a substrate, wherein said second tin-containing layer has a thickness less than said thickness of said copper pillar; and
after said providing said copper pillar on said chip and said first tin-containing layer over said copper pillar and said providing said second tin-containing layer on said substrate, joining said chip with said substrate, wherein said joining said chip with said substrate comprises joining said first tin-containing layer with said second tin-containing layer, wherein said first tin-containing layer contacts said second tin-containing layer, wherein said chip remains joined with said substrate.
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Abstract
A copper pillar may be provided on a chip and a first tin-containing layer may be provided over the copper pillar. A second tin-containing layer may be provided on a substrate. The first tin-containing layer may be joined with the second tin-containing layer during a packaging process.
213 Citations
20 Claims
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1. A method for fabricating a chip package, comprising:
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providing a copper pillar on a chip and a first tin-containing layer over said copper pillar, wherein said first tin-containing layer has a thickness less than a thickness of said copper pillar; providing a second tin-containing layer on a substrate, wherein said second tin-containing layer has a thickness less than said thickness of said copper pillar; and
after said providing said copper pillar on said chip and said first tin-containing layer over said copper pillar and said providing said second tin-containing layer on said substrate, joining said chip with said substrate, wherein said joining said chip with said substrate comprises joining said first tin-containing layer with said second tin-containing layer, wherein said first tin-containing layer contacts said second tin-containing layer, wherein said chip remains joined with said substrate. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for fabricating a chip package, comprising:
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providing a copper pillar on a chip and a tin-containing layer over said copper pillar, wherein said tin-containing layer has a thickness less than a thickness of said copper pillar; providing a gold-containing layer on a substrate, wherein said gold-containing layer has a thickness less than said thickness of said copper pillar; and
after said providing said copper pillar on said chip and said tin-containing layer over said copper pillar and said providing said gold-containing layer on said substrate, joining said chip with said substrate, wherein said joining said chip with said substrate comprises joining said tin-containing layer with said gold-containing layer, wherein said tin-containing layer contacts said gold-containing layer, wherein said chip remains joined with said substrate. - View Dependent Claims (8, 9, 10)
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11. A method for fabricating a chip package, comprising:
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providing a metal bump on a chip, wherein said metal bump comprises a copper pillar over said chip; providing a tin-containing layer on a substrate, wherein said tin-containing layer has a thickness greater than 15 micrometers and less than a thickness of said copper pillar; and joining said chip with said substrate, wherein said joining said chip with said substrate comprises joining said metal bump with said tin-containing layer using a process comprising a reflow process, wherein said metal bump contacts said tin-containing layer, wherein said chip remains joined with said substrate. - View Dependent Claims (12, 13, 14)
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15. A method for fabricating a chip package, comprising:
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providing a copper pillar on a chip and a first gold-containing layer over said copper pillar, wherein said first gold-containing layer has a thickness less than a thickness of said copper pillar; providing a second gold-containing layer on a substrate, wherein said second gold-containing layer has a thickness less than said thickness of said copper pillar; and after said providing said copper pillar on said chip and said first gold-containing layer over said copper pillar and said providing said second gold-containing layer on said substrate, joining said chip with said substrate, wherein said joining said chip with said substrate comprises joining said first gold-containing layer with said second gold-containing layer, wherein said first gold-containing layer contacts said second gold-containing layer, wherein said chip remains joined with said substrate. - View Dependent Claims (16)
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17. A method for fabricating a multi-chip structure, comprising:
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providing a copper layer on a first chip and a first tin-containing layer over said copper layer; providing a second tin-containing layer on a second chip; and after said providing said copper layer on said first chip and said first tin-containing layer over said copper layer and said providing said second tin-containing layer on said second chip, joining said first chip with said second chip, wherein said joining said first chip with said second chip comprises joining said first tin-containing layer with said second tin-containing layer, wherein said first tin-containing layer contacts said second tin-containing layer, wherein said first chip remains joined with said second chip. - View Dependent Claims (18, 19, 20)
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Specification