Method and structure for forming finFETs with multiple doping regions on a same chip
First Claim
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1. A method for fabrication of features for an integrated circuit, comprising:
- patterning a first semiconductor structure on a surface of a semiconductor substrate;
epitaxially growing semiconductor material on opposite sides of the first semiconductor structure to form a first fin and a second fin;
applying a first angled ion implantation to one side of the first semiconductor structure to dope the first fin on the one side without doping the second fin;
selectively removing the first semiconductor structure to expose the first fin and the second fin; and
forming fin field effect transistors using the first fin and the second fin.
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Abstract
A method for fabrication of features for an integrated circuit includes patterning a first semiconductor structure on a surface of a semiconductor device, and epitaxially growing semiconductor material on opposite sides of the first semiconductor structure to form fins. A first angled ion implantation is applied to one side of the first semiconductor structure to dope a respective fin on the one side. The first semiconductor structure is selectively removed to expose the fins. Fin field effect transistors are formed using the fins.
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Citations
16 Claims
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1. A method for fabrication of features for an integrated circuit, comprising:
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patterning a first semiconductor structure on a surface of a semiconductor substrate; epitaxially growing semiconductor material on opposite sides of the first semiconductor structure to form a first fin and a second fin; applying a first angled ion implantation to one side of the first semiconductor structure to dope the first fin on the one side without doping the second fin; selectively removing the first semiconductor structure to expose the first fin and the second fin; and forming fin field effect transistors using the first fin and the second fin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for fabrication of features for an integrated circuit, comprising:
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patterning mandrels on a surface of a semiconductor substrate; forming spacers about a periphery of the mandrels; applying a first angled ion implantation to introduce a first doping such that the spacers and mandrels faun a blocking mask to direct the first doping into an underlying semiconductor layer on one side of the blocking mask; applying a second angled ion implantation in an opposite direction to the first angled ion implantation to introduce a second doping such that the blocking mask directs the second doping into the underlying semiconductor layer on an opposite side of the blocking mask; selectively removing the mandrels relative to the spacers; patterning the underlying semiconductor layer using the spacers as an etch mask to form fins with the first doping and fins with second doping; annealing the fins with the first doping and fins with second doping; and forming fin field effect transistors using the fins. - View Dependent Claims (13, 14, 15, 16)
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Specification