Image sensor and manufacturing method thereof

• US 8,022,493 B2
• Filed: 09/17/2008
• Issued: 09/20/2011
• Est. Priority Date: 09/27/2007
• Status: Expired due to Fees

• Current Assignee: Dongbu HiTek Co., Ltd. (DB HiTek Co., Ltd.)
• Original Assignee: Dongbu HiTek Co., Ltd. (DB HiTek Co., Ltd.)
• Inventors: BANG, Sun Kyung
• Primary Examiner(s): Landau, Matthew
• Assistant Examiner(s): Hall, Jessica
• Application Number:
  US12/212,134
• Publication Number:
  US 20090085135A1
• Time in Patent Office: 1,098 Days
• Field of Search: 438/74, 257/294, 257/440, 257/444, 257/448, 257/233, 257/E31.055, 257/E31.127
• US Class Current: 257/440
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/1469 Assemblies, i.e. hybrid integration

Abstract

Provided are embodiments of an image sensor. The image sensor can comprise a first substrate including a transistor circuit, a lower interconnection layer, an upper interconnection layer, and a second substrate including a vertical stacked photodiode. The lower interconnection layer is disposed on the first substrate and comprises a lower interconnection connected to the transistor circuit. The upper interconnection layer is disposed on the lower interconnection layer and comprises an upper interconnection connected with the lower interconnection. The vertical stacked photodiode can be disposed on the upper interconnection layer and connected with the upper interconnection through, for example, a single plug connecting a blue, green, and red photodiode of the vertical stack or a corresponding plug for each of the blue, green, and red photodiode of the vertical stack.

Claims

1. An image sensor comprising:

a first substrate comprising a transistor circuit;

a lower interconnection layer on the first substrate, the lower interconnection layer comprising a lower interconnection electrically connected to the transistor circuit;

an upper interconnection layer on the lower interconnection layer, the upper interconnection layer comprising an upper interconnection connected with the lower interconnection; and

a second substrate comprising a vertical type photodiode on the upper interconnection layer, the vertical type photodiode being connected with the upper interconnection;

wherein the vertical type photodiode comprises;

a red photodiode, a green photodiode, and a blue photodiode stack;

a first plug directly connecting the blue photodiode to the green photodiode;

a second plug directly connecting the green photodiode to the red photodiode; and

a third plug directly connecting the red photodiode to the upper interconnection.

2. A method for manufacturing an image sensor, the method comprising:

forming a transistor circuit on a first substrate;

forming a lower interconnection layer comprising a lower interconnection connected to the transistor circuit on the first substrate;

forming a vertical type photodiode on a second substrate; and

connecting the second substrate to the first substrate;

wherein the forming of the vertical type diode on the second substrate comprises;

forming a first epitaxial layer on a semiconductor substrate;

forming a barrier layer inside the first epitaxial layer;

forming a second epitaxial layer on the first epitaxial layer; and

forming the vertical type photodiode inside the second epitaxial layer;

wherein the forming of the second epitaxial layer and the forming of the vertical type photodiode inside the second epitaxial layer comprises;

forming a primary second epitaxial layer on the first epitaxial layer;

forming a blue photodiode inside the primary second epitaxial layer;

forming a secondary second epitaxial layer on the primary second epitaxial layer including the blue photodiode;

forming a green photodiode in the secondary second epitaxial layer on the blue photodiode;

forming a tertiary second epitaxial layer on the secondary second epitaxial layer including the green photodiode;

forming a red photodiode in the tertiary second epitaxial layer on the green photodiode; and

wherein the forming of the second epitaxial layer and the forming of the vertical type photodiode inside the second epitaxial layer further comprises;

forming a first plug connecting the blue photodiode to the green photodiode;

forming a second plug connecting the green photodiode to the red photodiode;

forming a third plug connecting to the red photodiode and exposed at a surface of the second epitaxial layer; and

forming an upper interconnection layer comprising an upper interconnection connected to the third contact plug on the second epitaxial layer.