Semiconductor device comprising insulating film

• US 8,022,497 B2
• Filed: 02/28/2007
• Issued: 09/20/2011
• Est. Priority Date: 02/28/2006
• Status: Expired due to Fees

• Current Assignee: NEC Corporation, Sanyo Electric Company Limited (Panasonic Holdings Corporation), ROHM Co., Ltd.
• Original Assignee: NEC Corporation, Sanyo Electric Company Limited (Panasonic Holdings Corporation), ROHM Co., Ltd.
• Inventors: Chikaki, Shinichi, Yagi, Ryotaro, Shishida, Yoshinori
• Primary Examiner(s): WILLIAMS, ALEXANDER O
• Application Number:
  US11/711,764
• Publication Number:
  US 20070205484A1
• Time in Patent Office: 1,665 Days
• Field of Search: 257/499, 257/E23.019, 257/758, 257/774, 257/773, 257/750, 257/E21.24, 257/635, 257/775, 257/E21.795
• US Class Current: 257/499
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02216 the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31633 Deposition of carbon doped silicon oxide, e.g. SiOC
• CPC Class Codes: H01L 21/31695 Deposition of porous oxides or porous glassy oxides or oxide based porous glass
• CPC Class Codes: H01L 21/76807 for dual damascene structures
• CPC Class Codes: H01L 21/76829 characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76835 Combinations of two or more different dielectric layers having a low dielectric constant H01L21/76832 takes precedence
• CPC Class Codes: H01L 23/485 consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts H01L23/4821, H01L23/4822, H01L23/4824, H01L23/4825 take precedence; materials H01L23/532, bond pads H01L24/02, bump connectors H01L24/10
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device capable of preventing an interlayer dielectric film from deterioration resulting from a liquid such as a chemical solution penetrating into the interlayer dielectric film and recovering the interlayer dielectric film from deterioration with a prescribed gas is obtained. This semiconductor device comprises a first insulating film formed on a substrate and a first gas-liquid separation film, formed on at least a part of the surface of the first insulating film, composed of a material hardly permeable by a liquid and easily permeable by a gas.

Claims

1. A semiconductor device comprising:

a first insulating film formed on a substrate, wherein a trench is provided in the first insulating film to expose a surface of the substrate;

a first gas-liquid separation film, composed of an insulating film hardly permeable by a liquid and easily permeable by a gas, formed on the upper surface of said first insulating film and inside side surfaces of said first insulating film facing the trench.

2. The semiconductor device according to claim 1, further comprising a wiring layer formed on at least said part of the surface of said first insulating film.

3. The semiconductor device according to claim 2, wherein

said first insulating film has a first opening for communicating with said part of the surface of said substrate,

said first gas-liquid separation film is formed at least either on the inner surface of said first opening of said first insulating film or on the upper surface of said first insulating film opposite to said substrate, and

said wiring layer is formed inside said first opening of said first insulating film.

4. The semiconductor device according to claim 3, wherein

said first gas-liquid separation film is formed on both of the inner surface of said first opening of said first insulating film and the upper surface of said first insulating film opposite to said substrate.

5. The semiconductor device according to claim 3, wherein

said first gas-liquid separation film is formed not on the inner surface of said first opening of said first insulating film but on the upper surface of said first insulating film opposite to said substrate.

6. The semiconductor device according to claim 3, wherein

said first gas-liquid separation film is formed not on the upper surface of said first insulating film opposite to said substrate but on the inner surface of said first opening of said first insulating film.

7. The semiconductor device according to claim 3, further comprising a barrier metal layer arranged between said wiring layer and said substrate.

8. The semiconductor device according to claim 3, further comprising:

a second insulating film formed on said first insulating film, and

a second gas-liquid separation film, formed on at least a part of the surface of said second insulating film, composed of a material hardly permeable by a liquid and easily permeable by a gas, wherein

said second insulating film has a second opening connected to said first opening of said first insulating film,

said first gas-liquid separation film and said second gas-liquid separation film are formed at least either on the inner surfaces of said first and second openings or on the upper surfaces of

said first and second insulating films opposite to said substrate, and

said wiring layer is formed inside said first and second openings.

9. The semiconductor device according to claim 8, wherein

said first gas-liquid separation film and said second gas-liquid separation film are formed on both of the inner surfaces of said first and second openings and the upper surfaces of said first and second insulating films opposite to said substrate.

10. The semiconductor device according to claim 1, wherein

said first gas-liquid separation film includes a gas-liquid separation film composed of SiOC.

11. The semiconductor device according to claim 10, wherein

said first gas-liquid separation film has a thickness of at least 5 nm and not more than 15 nm.

12. The semiconductor device according to claim 1, wherein

said first insulating film includes a porous insulating film.

13. The semiconductor device according to claim 1,

wherein the first gas-liquid separation film is composed of a material hardly permeable by a liquid and easily permeable by tetramethylcyclotetrasiloxane, and tetramethylcyclotetrasiloxane is introduced into said first insulating film.

14. The semiconductor device according to claim 1, further comprising:

a barrier metal layer formed on both the substrate and the gas-liquid separation film inside the trench.