Semiconductor memory device, method for fabricating the same and semiconductor switching device
First Claim
1. A semiconductor memory device comprising:
- a stacked-layer film formed of a ferroelectric layer and a semiconductor layer;
a first electrode formed on the ferroelectric layer of the stacked-layer film; and
a plurality of second electrodes formed on the semiconductor layer of the stacked-layer film,wherein each of parts (A) of the semiconductor layer located in regions in which the second electrodes are formed, respectively, holds one of a first state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a low resistance state is achieved and a second state in which minority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a high resistance state is achieved, andpart (B) of the semiconductor layer located in a region other than the regions in which the second electrodes are formed, respectively, holds a low resistance state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer.
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Abstract
A first electrode is formed on a stacked-layer film, which is formed of a ferroelectric layer and a semiconductor layer, at the ferroelectric layer and a plurality of second electrodes are formed on the stacked-layer film at the semiconductor layer side. Each of parts of the semiconductor layer located in regions in which the second electrodes are formed functions as a resistance modulation element (memory) using the polarization assist effect of the ferroelectric layer. Information (a low resistance state or a high resistance state) held in a memory is read by detecting a value of a current flowing in each part of the semiconductor layer. Information is written in a memory by inverting a polarization of the ferroelectric layer.
26 Citations
23 Claims
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1. A semiconductor memory device comprising:
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a stacked-layer film formed of a ferroelectric layer and a semiconductor layer; a first electrode formed on the ferroelectric layer of the stacked-layer film; and a plurality of second electrodes formed on the semiconductor layer of the stacked-layer film, wherein each of parts (A) of the semiconductor layer located in regions in which the second electrodes are formed, respectively, holds one of a first state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a low resistance state is achieved and a second state in which minority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a high resistance state is achieved, and part (B) of the semiconductor layer located in a region other than the regions in which the second electrodes are formed, respectively, holds a low resistance state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A semiconductor switching device comprising:
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a stacked-layer film formed of a ferroelectric layer and a semiconductor layer; a first electrode formed on the ferroelectric layer of the stacked-layer film; and a plurality of second electrodes formed on the semiconductor layer of the stacked-layer film; wherein each of parts (A) of the semiconductor layer located in regions in which the second electrodes are formed, respectively, holds one of an ON state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a low resistance state is achieved, and an OFF state in which minority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer and thereby a high resistance state is achieved, and part (B) of the semiconductor layer located in a region other than the regions in which the second electrodes are formed, respectively, holds a low resistance state in which majority carriers in the semiconductor layer are coupled with polarization charges in the ferroelectric layer. - View Dependent Claims (22, 23)
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Specification