Multi-rate, multi-port, gigabit serdes transceiver

• US 8,023,436 B2
• Filed: 04/04/2008
• Issued: 09/20/2011
• Est. Priority Date: 10/29/2002
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Baumer, Howard A.
• Primary Examiner(s): Pham; Chi
• Assistant Examiner(s): BOAKYE, ALEXANDER O
• Application Number:
  US12/078,780
• Publication Number:
  US 20080186987A1
• Time in Patent Office: 1,264 Days
• Field of Search: 370/247, 370/257, 370/258, 370/278, 370/282, 370/333, 370/362, 370/365, 370/366, 370/403, 370/405, 370/421, 370/460, 370/356, 710/20
• US Class Current: 370/258
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: H04L 43/50 Testing arrangements
• CPC Class Codes: Y04S 40/00 Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them

Abstract

A multi-port SERDES transceiver includes multiple parallel ports and serial ports, and includes the flexibility to connect any one of the parallel ports to another parallel port or to a serial port, or both. Furthermore, the multi-port transceiver chip can connect any one of serial ports to another serial port or to one of the parallel ports. The substrate layout of the multi-port SERDES transceiver chip is configured so that the parallel ports and the serial ports are on the outer perimeter of the substrate. A logic core is at the center of the substrate, where the logic core operates the serial and parallel data ports, and the bus that connects the data ports. The bus can be described as a “ring” structure (or donut “structure”) around the logic core, and is configured between the logic core and the data ports. The ring structure of the bus provides efficient communication between the logic core and the various data ports.

Claims

1. A method for transmitting data, comprising:

(A) receiving a first stream of serial data by a first serial port;

(B) converting the first stream serial data to a stream of parallel data;

(C) routing the stream of parallel data from the first serial port through one or more adjacent ports until reaching a second serial port, the first and the second serial ports and the one or more adjacent ports being arranged in a ring structure that is configured to transmit the stream of parallel data in a parallel format;

(D) converting the stream of parallel data to a second stream of serial data at the second serial port; and

(E) transmitting the second stream of serial data from the second serial port.

2. The method of claim 1, wherein step (A) comprises:

(A)(i) receiving a first 10 Gigabit Attachment Unit Interface (XAUI) stream of serial data by the first serial port.

3. The method of claim 2, wherein step (B) comprises:

(B)(i) converting the first XAUI stream of serial data to 10 Gigabit Media Independent Interface (XGMII) stream of parallel data.

4. The method of claim 3, wherein step (D) comprises:

(D)(i) converting the XGMII stream of parallel data to a second XAUI stream of serial data.

5. The method of claim 4, wherein step (E) comprises:

(E)(i) transmitting the second XAUI stream of serial data from the second serial port.

6. The method of claim 1, wherein step (B) comprises:

(B)(i) converting the first stream serial data to the stream of parallel data using a 10 Gigabit Ethernet Extended Sublayer (XGXS) conversion protocol.

7. The method of claim 1, wherein step (D) comprises:

(D)(i) converting the stream of parallel data to the second stream of serial data at the second serial port using a 10 Gigabit Ethernet Extended Sublayer (XGXS) conversion protocol.

18. The method of claim 1, further comprising:

(F) capturing the stream of parallel data for bit error testing as the stream of parallel data is routed from the first serial port.

8. A method for transmitting data, comprising:

(A) receiving a stream of serial data by a serial port;

(B) converting the stream of serial data to a stream of parallel data;

(C) routing the stream of parallel data from the serial port through one or more adjacent ports until reaching a parallel port, the serial port, the one or more adjacent ports, and the parallel port being arranged in a ring structure that is configured to transmit the stream of parallel data in a parallel format; and

(D) transmitting the stream of parallel data from the parallel port.

9. The method of claim 8, wherein step (A) comprises:

(A)(i) receiving a 10 Gigabit Attachment Unit Interface (XAUI) stream of serial data by the serial port.

10. The method of claim 9, wherein step (B) comprises:

(B)(i) converting the XAUI stream of serial data to 10 Gigabit Media Independent Interface (XGMII) stream of parallel data.

11. The method of claim 10, wherein step (D) comprises:

(D)(i) transmitting the XGMII stream of parallel data from the parallel port.

12. The method of claim 8, wherein step (D) comprises:

(D)(i) converting the stream of serial data to the stream of parallel data using a 10 Gigabit Ethernet Extended Sublayer (XGXS) conversion protocol.

19. The method of claim 8, further comprising:

(E) capturing the stream of parallel data for bit error testing as the stream of parallel data is routed from the serial port.

13. A method for transmitting data, comprising:

(A) receiving a stream of parallel data by a parallel port;

(B) routing the stream of parallel data from the parallel port through one or more adjacent ports until reaching a serial port, the parallel port, the one or more adjacent ports, and the parallel port being arranged in a ring structure that is configured to transmit the stream of parallel data in a parallel format;

(C) converting the stream of parallel data to a stream of serial data; and

(D) transmitting the stream of serial data from the serial port.

14. The method of claim 13, wherein step (A) comprises:

(A)(i) receiving a stream of 10 Gigabit Media Independent Interface (XGMII) stream of parallel data by the parallel port.

15. The method of claim 14, wherein step (C) comprises:

(C)(i) converting the XGMII stream of parallel data to a 10 Gigabit Attachment Unit Interface (XAUI) stream of serial data.

16. The method of claim 15, wherein step (D) comprises:

(D)(i) transmitting the XAUI stream of serial data from the serial port.

17. The method of claim 13, wherein step (D) comprises:

(C)(i) converting the stream of parallel data to the stream of serial data using a 10 Gigabit Ethernet Extended Sublayer (XGXS) conversion protocol.

20. The method of claim 13, further comprising:

(E) capturing the stream of parallel data for bit error testing as the stream of parallel data is routed from the parallel port.