Encryption/decryption apparatus

• US 8,023,643 B2
• Filed: 08/29/2006
• Issued: 09/20/2011
• Est. Priority Date: 09/29/2005
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshia
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Shimizu, Hideo, Fujisaki, Koichi, Shimbo, Atsushi
• Primary Examiner(s): PEARSON, DAVID J
• Application Number:
  US11/511,401
• Publication Number:
  US 20070071235A1
• Time in Patent Office: 1,848 Days
• Field of Search: 380/1
• US Class Current: 380/1
• CPC Class Codes: H04L 2209/046 of operations, operands or results of the operations
• CPC Class Codes: H04L 2209/08 Randomization, e.g. dummy operations or using noise
• CPC Class Codes: H04L 2209/12 Details relating to cryptographic hardware or logic circuitry
• CPC Class Codes: H04L 9/003 for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]

Abstract

A first Exclusive OR circuit operates an Exclusive OR between input data and a predetermined random number. An operation circuit performs one operation of encryption and decryption of output data from the first Exclusive OR circuit. A data register circuit, which has a plurality of data hold units, holds data from the operation circuit in one data hold unit of the plurality of data hold units in response to a selection signal, and supplies the data from the one data hold unit to the operation circuit. A second Exclusive OR circuit performs an Exclusive OR between output data from the data register circuit and the random number. The operation circuit recursively performs the one operation of the data from the data register circuit and outputs next data to the data register circuit.

Claims

1. An encryption/decryption apparatus comprising:

a random number supply unit configured to supply a random number;

a first Exclusive OR circuit configured to perform an Exclusive OR between input data and the random number;

an operation circuit configured to perform an operation of one of encryption or decryption of output data from the first Exclusive OR circuit;

a selection signal generation unit configured to repeatedly generate a selection signal in synchronization with output timing of data from the operation circuit;

a data register circuit having a plurality of data hold units, the data register circuit configured to hold data from the operation circuit in one data hold unit in response to the selection signal, the selection signal selectively indicating the one data hold unit from among the plurality of data hold units, the data register circuit further configured to supply the data from the one data hold unit to the operation circuit; and

a second Exclusive OR circuit configured to perform an Exclusive OR between the data supplied from the data register circuit and the random number;

wherein the operation circuit is further configured to recursively perform the one operation on the data supplied from the data register circuit and to output operated data to the data register circuit.

2. The encryption/decryption apparatus according to claim 1, wherein the plurality of data hold units is two data hold units.

3. The encryption/decryption apparatus according to claim 1, wherein the plurality of data hold units is equal to or more than three data hold units.

4. The encryption/decryption apparatus according to claim 1, wherein the random number supply unit includes a random number generator configured to repeatedly generate a random number of which length is shorter than the input data, and a random number hold unit configured to connect a plurality of random numbers from the random number generator and to fixedly hold the random number of which length is equal to the input data.

5. The encryption/decryption apparatus according to claim 1, wherein the operation circuit executes operation processing of the output data from the first Exclusive OR circuit at the first operation time, and executes the operation processing of previous operated data from the second operation time.

6. The encryption/decryption apparatus according to claim 5, wherein the random number supply unit fixedly supplies the random number before the first operation time.

7. The encryption/decryption apparatus according to claim 1, wherein the first Exclusive OR circuit is included in the operation circuit.

8. The encryption/decryption apparatus according to claim 1, wherein the data register circuit holds the data in one data hold unit selected by the selection signal whenever the data is input from the operation circuit.

9. The encryption/decryption apparatus according to claim 8, wherein the data register circuit recursively supplies the data from the one data hold unit to the operation circuit at each operation time while an operation completion signal from the operation circuit is not received.

10. The encryption/decryption apparatus according to claim 9, wherein the data register circuit outputs the data from the one data hold unit to the second Exclusive OR circuit in response to the operation complete signal.

11. The encryption/decryption apparatus according to claim 10, wherein the second Exclusive OR circuit outputs an operation result of Exclusive OR between the data and the random number to the outside.

12. The encryption/decryption apparatus according to claim 1, wherein if the input text data is plain text data, the operation circuit operates encryption of the plain text data and outputs cipher text data as an encryption result.

13. The encryption/decryption apparatus according to claim 1, wherein if the input text data is cipher text data, the operation circuit operates decryption of the cipher text data and outputs plain text data as a decryption result.

14. The encryption/decryption apparatus according to claim 1, wherein the selection signal does not continually indicate the same data hold unit in the plurality of data hold units.

15. The encryption/decryption apparatus according to claim 1, wherein the data register circuit resets contents of another data hold unit not selected by the selection signal in the plurality of data hold units.

16. The encryption/decryption apparatus according to claim 1, wherein the data register circuit reverses contents of another data hold unit not selected by the selection signal in the plurality of data hold units.

17. The encryption/decryption apparatus according to claim 1, wherein the data register circuit rewrites contents of another data hold unit not selected by the selection signal with predetermined binary data or a random number.

18. The encryption/decryption apparatus of claim 1, wherein the one data hold unit is a first data hold unit and the selection signal is a first selection signal, and wherein the data register circuit is further configured to:

receive the operated data from the operation circuit after the operation unit recursively performs the operation; and

store the operated data in a second data hold unit of the plurality of data hold units in accordance with a second selection signal,

wherein a first indicator and a second indicator from a predefined selection pattern of indicators are selected in-order, to generate the first selection signal and the second selection signal, and wherein the first indicator and the second indicator indicate the first data hold unit and the second data hold unit.

19. A method for performing encryption/decryption comprising the steps of:

identifying a random number;

performing an Exclusive OR operation between input data and the random number;

performing, at an operation circuit, an operation of one of encryption or decryption of output data from the Exclusive OR operation;

identifying a selection signal in synchronization with output timing of data from the operation circuit;

in response to the selection signal, holding data from the operation circuit in one data hold unit of a plurality of data hold units of a data register circuit, the selection signal selectively indicating the one data hold unit from among the plurality of data hold units;

supplying the data from the one data hold unit to the operation circuit;

recursively performing, at the operation circuit, the operation on the data supplied from the one data hold unit; and

output operated data from the operation circuit to the data register circuit.