Adaptive radio transceiver with an antenna matching circuit

• US 8,023,902 B2
• Filed: 03/31/2010
• Issued: 09/20/2011
• Est. Priority Date: 10/21/1999
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Maryam, Rofougaran, Ahmadreza, Moloudi, Shervin
• Primary Examiner(s): Milord; Marceau
• Application Number:
  US12/751,328
• Publication Number:
  US 20100255792A1
• Time in Patent Office: 538 Days
• Field of Search: 455/73, 455/78, 455/82, 455/86, 455/83, 455/313, 455/323, 455/76, 455/88, 333/109, 333/103, 333/116
• US Class Current: 455/78
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03F 1/56 Modifications of input or output impedances, not otherwise provided for
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 2203/45386 the AAC comprising one or more coils in the source circuit
• CPC Class Codes: H03F 2203/45526 the FBC comprising a resistor-capacitor combination and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45528 the FBC comprising one or more passive resistors and being coupled between the LC and the IC
• CPC Class Codes: H03F 2203/45638 the LC comprising one or more coils
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03G 11/00 Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
• CPC Class Codes: H03G 3/001 Digital control of analog signals
• CPC Class Codes: H03H 11/126 using a single operational amplifier H03H11/1204 takes precedence; parallel-T filters H03H11/1295
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 11/344 : Duplexers
• CPC Class Codes: H03H 2011/0494 : Complex filters
• CPC Class Codes: H03H 21/0001 : Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 : Digital adaptive filters
• CPC Class Codes: H03H 2210/025 : Capacitor
• CPC Class Codes: H03H 2210/036 : Stepwise
• CPC Class Codes: H03H 7/42 : Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
• CPC Class Codes: H03J 2200/10 : Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 7/099 : concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/18 : using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H04B 17/104 : of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 : of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 : Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1. A wireless communications device with at least one antenna, comprising:

a wireless transmitter of a wireless transceiver;

a wireless receiver of the wireless transceiver; and

at least one coupling circuit,

wherein the at least one coupling circuit continuously and operatively couples, with a substantially constant impedance, at least one output of the wireless transmitter to at least one input of the wireless receiver,

wherein the at least one coupling circuit comprises at least one first node and at least one second node,

wherein the at least one output of the wireless transmitter operatively couples a transmission signal to the at least one antenna,

wherein one of the at least one output of the wireless transmitter is operatively coupled to one of the at least one first node of the at least one coupling circuit,

wherein the at least one input of the wireless receiver operatively couples a receive signal from the at least one antenna,

wherein one of the at least one input of the wireless receiver is operatively coupled to one of the at least one second node of the at least one coupling circuit,

wherein the wireless communications device supports spread spectrum modulation and supports wireless radio frequency communications,

wherein the wireless communications device employs CMOS technology, and

wherein the wireless transmitter and the wireless receiver are integrated on an integrated circuit chip.

2. The wireless communications device according to claim 1, wherein the wireless communications device supports orthogonal frequency division multiplexing.

3. The wireless communications device according to claim 2, wherein the wireless communications device supports one or more of the following:

frequency hopping and direct sequence spread spectrum modulation.

4. The wireless communications device according to claim 1, wherein the wireless communications device supports direct sequence spread spectrum modulation and frequency hopping.

5. The wireless communications device according to claim 1, wherein the at least one coupling circuit, the wireless transmitter and the wireless receiver are integrated on the integrated circuit chip.

6. The wireless communications device according to claim 5, wherein the integrated circuit chip is a single integrated circuit chip.

7. The wireless communications device according to claim 1, wherein the wireless communications device supports wireless local area network communications.

8. The wireless communications device according to claim 1, wherein the wireless communications device supports wireless local area network communications and Bluetooth communications.

9. The wireless communications device according to claim 1, wherein the wireless transceiver is configured as an adaptive radio transceiver.

10. The wireless communications device according to claim 1, wherein the wireless transceiver is configured according to at least one of the following:

a low intermediate frequency heterodyne architecture and a heterodyne complex architecture.

11. The wireless communications device according to claim 1, wherein the wireless communications device supports dynamic RC calibration.

12. The wireless communications device according to claim 1, wherein the wireless communications device supports one or more of the following:

quadrature amplitude modulation, binary phase shift keying, quadrature phase shift keying, offset quadrature phase shift keying, frequency shift keying, phase shift keying, and multiple frequency modulation.

13. The wireless communications device according to claim 1, wherein the wireless communications device is capable of performing phase shift keying.

14. The wireless communications device according to claim 1, wherein the at least one output of the wireless transmitter is disabled when the at least one input of the wireless receiver is enabled, or wherein the at least one input of the wireless receiver is disabled when the at least one output of the wireless transmitter is enabled.

15. The wireless communications device according to claim 1, wherein the wireless transmitter comprises a power amplifier that provides one of the at least one output of the wireless transmitter, and wherein the wireless receiver comprises a low noise amplifier that provides one of the at least one input of the wireless receiver.

16. The wireless communications device according to claim 15, wherein one of the at least one output of the wireless transmitter and one of the at least one input of the wireless receiver comprise a differential line, and wherein the differential line is interfaced to the at least one antenna using a matching circuit.

17. The wireless communications device according to claim 16, wherein the at least one antenna comprises a single-ended antenna.

18. The wireless communications device according to claim 1, wherein the at least one antenna is operatively coupled to a first differential line via a first series capacitor and a first shunt inductor, and wherein the at least one antenna is operatively coupled to a second differential line via a second series capacitor and a second shunt inductor.

19. The wireless communications device according to claim 18, wherein the first series capacitor, the first shunt inductor, the second series inductor and the second shunt capacitor are arranged to substantially match an impedance of the at least one antenna.

20. The wireless communications device according to claim 18, wherein a first capacitance of the at least one input of the wireless receiver is compensated using a circuital arrangement that includes the first series capacitor, the first shunt inductor, the second series inductor and second the shunt capacitor when the at least one input of the wireless receiver is disabled, or wherein a second capacitance of the at least one output of the wireless transmitter is compensated for using the circuital arrangement when the at least one output of the wireless transmitter is disabled.