Digital signal processing based de-serializer

• US 8,027,410 B2
• Filed: 01/02/2008
• Issued: 09/27/2011
• Est. Priority Date: 03/01/2001
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Agazzi, Oscar E.
• Primary Examiner(s): Bocure; Tesfaldet
• Application Number:
  US11/968,450
• Publication Number:
  US 20080101510A1
• Time in Patent Office: 1,364 Days
• Field of Search: 375/316, 375/324, 375/355, 375/345, 341/118, 341/120, 455/234.1, 455/234.2, 327/50, 327/58, 327/59, 327/60
• US Class Current: 375/316
• CPC Class Codes: H03M 1/0624 by synchronisation
• CPC Class Codes: H03M 1/0836 of phase error, e.g. jitter
• CPC Class Codes: H03M 1/0863 of switching transients, e.g. glitches
• CPC Class Codes: H03M 1/1215 using time-division multiplexing
• CPC Class Codes: H04B 10/69 Electrical arrangements in the receiver
• CPC Class Codes: H04L 2025/03445 Time domain
• CPC Class Codes: H04L 25/03057 with a recursive structure H04L25/03031 takes precedence
• CPC Class Codes: H04L 25/03159 operating in the frequency domain H04L25/03165, H04L25/03178 take precedence
• CPC Class Codes: H04L 7/0062 detection of error based on data decision error, e.g. Mueller type detection

Abstract

A DSP based SERDES performs compensation operations to support high speed de-serialization. A receiver section of the DSP based SERDES includes one or more ADCs and DSPs. The ADC operates to sample (modulated) analog serial data and to produce digitized serial data (digital representation of the modulated analog serial data). The DSP communicatively couples to the ADC and receives the digitized serial data. Based upon the known characteristics of the digitized serial data and the digitized serial data itself, the DSP determines compensation operations to be performed upon the serial data to compensate for inadequacies of the receiver and/or channel response. These compensation operations may be (1) performed on the analog serial data before digitization by the ADC; (2) applied to the ADC to modify the operation of the ADC; and/or (3) performed on the digitized serial data by the DSP or another device.

Claims

1. A communication device, comprising:

a compensation circuitry implemented to process a first signal thereby generating a second signal;

an analog to digital converter (ADC) implemented to sample the second signal to generate digital samples there from; and

a digital signal processor (DSP) implemented to receive the digital samples, wherein;

the DSP implemented to determine adaptively at least one compensation operation to be performed on the digital samples so that the digital samples may be properly characterized to extract digital data contained therein; and

at least one module, within the communication device and coupled to the DSP, implemented to perform the at least one compensation operation as directed by the DSP; and

the DSP implemented to determine adaptively at least one additional compensation operation to be performed on the first signal by the compensation circuitry.

2. The communication device of claim 1, wherein:

the at least one module within communication device is the ADC.

3. The communication device of claim 1, wherein:

the compensation circuitry including a programmable gain amplifier (PGA).

4. The communication device of claim 1, wherein:

the DSP implemented to determine adaptively at least one additional compensation operation to be performed on the digital samples; and

the DSP implemented to perform the at least one additional compensation operation.

5. The communication device of claim 1, wherein:

the compensation circuitry including a plurality of programmable gain amplifiers (PGAs).

6. The communication device of claim 1, wherein:

the compensation circuitry including a programmable gain amplifier (PGA) whose operation is governed in accordance with an automatic gain control (AGC).

7. The communication device of claim 1, wherein:

the ADC is one ADC of a plurality of ADCs within the communication device;

each ADC of the plurality of ADCs is coupled to the DSP;

each ADC of the plurality of ADCs implemented to perform sampling of the second signal;

the at least one compensation operation is one compensation operation of a plurality of compensation operations;

the DSP implemented to determine adaptively the plurality of compensation operations to be performed on the digital samples; and

the plurality of compensation operations performed on the digital samples by each ADC of the plurality of ADCs.

8. The communication device of claim 1, further comprising:

at least one additional module implemented to process the digital samples before the digital samples received by the DSP; and

the DSP implemented to determine adaptively at least one additional compensation operation to be performed on the digital samples by the at least one additional module.

9. The communication device of claim 1, wherein:

the DSP including at least one of a feedback equalizer and a decision feedback equalizer implemented to assist in determining the at least one compensation operation.

10. The communication device of claim 1, wherein:

the ADC and the DSP are implemented within an integrated circuit.

11. A communication device, comprising:

a compensation circuitry implemented to process a first signal thereby generating a second signal;

an analog to digital converter (ADC) implemented to sample the second signal to generate digital samples there from; and

a digital signal processor (DSP) implemented to receive the digital samples, wherein;

the DSP implemented to determine adaptively a first compensation operation to be performed on the first signal by the compensation circuitry and a second compensation operation to be performed on the digital samples so that the digital samples may be properly characterized to extract digital data contained therein.

12. The communication device of claim 11, wherein:

the DSP implemented to determine adaptively a third compensation operation to adjust at least one operational parameter of the ADC so that the digital samples may be properly characterized to extract digital data contained therein.

13. The communication device of claim 11, wherein:

the DSP implemented to determine adaptively a third compensation operation to adjust at least one operational parameter of the ADC so that the digital samples may be properly characterized to extract digital data contained therein; and

the at least one operational parameter of the ADC is an ADC phase mismatch, an ADC gain mismatch, or an ADC offset mismatch.

14. The communication device of claim 11, wherein:

the DSP implemented to perform the second compensation operation on the digital samples so that the digital samples may be properly characterized to extract digital data contained therein.

15. The communication device of claim 11, wherein:

the ADC and the DSP are implemented within an integrated circuit.

16. A communication device, comprising:

an analog to digital converter (ADC) implemented to sample a signal to generate digital samples there from; and

a digital signal processor (DSP) implemented to receive the digital samples, wherein;

the DSP implemented to determine adaptively a first compensation operation to be performed on the signal by a compensation circuitry and a second compensation operation to adjust at least one operational parameter of the ADC so that the digital samples may be properly characterized to extract digital data contained therein.

17. The communication device of claim 16, wherein:

the signal is a first signal; and

the compensation circuitry implemented to process a second signal thereby generating the first signal.

18. The communication device of claim 16, wherein:

the signal is a first signal;

the compensation circuitry implemented to process a second signal thereby generating the first signal; and

the DSP implemented to determine adaptively a third compensation operation to be performed on the first signal by the compensation circuitry so that the digital samples may be properly characterized to extract digital data contained therein.

19. The communication device of claim 16, wherein:

the DSP including at least one of a feedback equalizer and a decision feedback equalizer implemented to assist in determining at least one of the first compensation operation and the second first compensation operation.

20. The communication device of claim 16, wherein:

the ADC and the DSP are implemented within an integrated circuit.