Method and system for single chip satellite set-top box system
First Claim
1. A system for processing signals, the system comprising:
- a single integrated circuit chip, wherein said single integrated circuit chip comprises;
one or more processors coupled to a first satellite receiver demodulator and a second satellite receiver demodulator, wherein access to information received by said first and said second satellite receiver demodulators is controlled using at least one secure key stored in on-chip memory within said single integrated circuit chip;
one or more video decoders coupled to said one or more processors;
one or more video and graphics display engines coupled to said one or more video decoders; and
one or more video encoders coupled to said one or more video and graphics display engines.
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Accused Products
Abstract
A system for processing signals is disclosed and may include a single integrated circuit chip. The single integrated circuit chip (SICC) may include one or more processors coupled to a first satellite receiver demodulator and a second satellite receiver demodulator. The SICC may also include one or more video decoders coupled to the one or more processors, and one or more video and graphics display engines coupled to the one or more video decoders. The SICC may further include one or more video encoders coupled to the one or more video and graphics display engines. One or more video digital-to-analog converters and one or more RF modulators may be integrated within the SICC, and the one or more video digital-to-analog converters and the one or more RF modulators may be coupled to the one or more video encoders. The video decoder may include a standard definition MPEG-2 video decoder.
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Citations
54 Claims
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1. A system for processing signals, the system comprising:
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a single integrated circuit chip, wherein said single integrated circuit chip comprises; one or more processors coupled to a first satellite receiver demodulator and a second satellite receiver demodulator, wherein access to information received by said first and said second satellite receiver demodulators is controlled using at least one secure key stored in on-chip memory within said single integrated circuit chip; one or more video decoders coupled to said one or more processors; one or more video and graphics display engines coupled to said one or more video decoders; and one or more video encoders coupled to said one or more video and graphics display engines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A system for processing signals, the system comprising:
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one or more circuits integrated within a single integrated circuit chip, said one or more circuits comprising one or more processors, a first satellite receiver demodulator, a second satellite receiver demodulator, on-chip memory, one or more video decoders, one or more video and graphics display engines, and one or more video encoders, wherein; said one or more processors are coupled to said first satellite receiver demodulator and said second satellite receiver demodulator, wherein access to information received by said first and said second satellite receiver demodulators is controlled using at least one secure key stored in said on-chip memory within said single integrated circuit chip; said one or more video decoders are coupled to said one or more processors; said more or more video and graphics display engines are coupled to said one or more video decoders; and said one or more video encoders are coupled to said one or more video and graphics display engines. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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41. A method for processing information, the method comprising:
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performing by one or more processors and/or circuits within a single integrated circuit chip; receiving a first modulated signal by a first satellite receiver integrated within said single integrated circuit chip; demodulating said first modulated signal by said first satellite receiver to generate a first demodulated signal; receiving a second modulated signal by a second satellite receiver integrated within said single integrated circuit chip; demodulating said second modulated signal by said second satellite receiver within to generate a second demodulated signal, wherein access to information received by said first and said second satellite receiver demodulators is controlled using at least one secure key stored in on-chip memory within said single integrated circuit chip; decoding a video portion of said second demodulated signal to generate a second decoded video signal; encoding said second decoded video signal to generate a second encoded digital video signal; and converting said second encoded digital video signal to a second analog video signal. - View Dependent Claims (42, 43, 44, 45, 46, 47)
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48. A method for processing information, the method comprising:
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performing by one or more processors and/or circuits within a single integrated circuit chip; receiving a first modulated signal by a first satellite receiver; demodulating said first modulated signal by said first satellite receiver to generate a first demodulated signal; receiving a second modulated signal by a second satellite receiver; demodulating said second modulated signal by said second satellite receiver to generate a second demodulated signal, wherein access to information received by said first and said second satellite receiver demodulators is controlled using at least one secure key stored in on-chip memory within said single integrated circuit chip; decoding a video portion of said second demodulated signal to generate a second decoded video signal; decoding an audio portion of said second demodulated signal to generate a second decoded digital audio signal; and converting said second decoded digital audio signal to a second analog audio signal. - View Dependent Claims (49, 50, 51, 52, 53, 54)
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Specification