System and method for data synchronization for a computer architecture for broadband networks

• US 8,028,288 B2
• Filed: 10/18/2004
• Issued: 09/27/2011
• Est. Priority Date: 03/22/2001
• Status: Active Grant

• Current Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Original Assignee: Sony Computer Entertainment Incorporated (Sony Group Corp.)
• Inventors: Yamazaki, Takeshi, Suzuoki, Masakazu
• Primary Examiner(s): Puente; Emerson
• Assistant Examiner(s): Truong; Camquy
• Application Number:
  US10/967,433
• Publication Number:
  US 20050081209A1
• Time in Patent Office: 2,535 Days
• Field of Search: 718/102
• US Class Current: 718/104
• CPC Class Codes: G06F 12/1466 Key-lock mechanism
• CPC Class Codes: H04L 69/12 Protocol engines

Abstract

A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing computer tasks is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors manages process scheduling of computing tasks by providing tasks to at least one of the first and second processors.

Claims

1. A processing system for processing computing tasks, comprising:

a first processor of a first processor type; and

a plurality of second processors of a second processor type operatively connected to the first processor, a selected one of the second processors being configured to manage process scheduling of the computing tasks by assigning selected ones of the computing tasks to one or more of the first processor and the plurality of second processors;

wherein the computing tasks comprise one or more software cells, each of the software cells comprising data to be processed and a cell identifier, and the selected second processor is configured to assign the computing tasks based upon the cell identifier;

wherein each of the software cells further comprises a previous cell identifier relating to a group of software cells requiring sequential processing; and

wherein the computing tasks comprise processing of software cells, and the selected second processor provides the selected computing tasks based upon information within the software cells.

2. The processing system of claim 1, wherein the selected second processor provides the selected computing tasks based upon a load balancing factor.

3. A processing system for processing computing tasks, comprising:

a first processor of a first processor type; and

a plurality of second processors of a second processor type operatively connected to the first processor, a selected one of the second processors being configured to manage process scheduling of the computing tasks by assigning selected ones of the computing tasks to one or more of the first processor and the plurality of second processors;

wherein the computing tasks comprise one or more software cells, each of the software cells comprising data to be processed and a cell identifier, and the selected second processor is configured to assign the computing tasks based upon the cell identifier;

wherein each of the software cells further comprises a previous cell identifier relating to a group of software cells requiring sequential processing; and

wherein the selected second processor is configured to identify from the previous cell identifier of a currently received software cell a particular second processor assigned to processing previously received software cells of the group of software cells and, on the basis of this identification, is also configured to assign the currently received software cell to the particular second processor.

4. A processing system for processing computing tasks, comprising:

a first processor of a first processor type; and

a plurality of second processors of a second processor type operatively connected to the first processor, a selected one of the second processors being configured to manage process scheduling of the computing tasks by assigning selected ones of the computing tasks to one or more of the first processor and the plurality of second processors;

wherein the computing tasks comprise one or more software cells, each of the software cells comprising data to be processed and a cell identifier, and the selected second processor is configured to assign the computing tasks based upon the cell identifier; and

wherein each of the software cells further comprises a previous cell identifier relating to a group of software cells requiring sequential processing; and

wherein the software cells of the computing tasks comprise one or more data structures, each of the data structures comprising the data to be processed, and the selected second processor receives at least one of the data structures and assigns the at least one data structure in accordance with an attribute of the at least one data structure.

5. The processing system of claim 4, wherein the selected second processor provides the selected computing tasks based upon a load balancing factor.

6. A method of processing computing tasks in a processing system, the processing system including a first processor of a first processor type and a plurality of second processors of a second processor type operatively connected to the first processor, the method comprising:

receiving data at a selected one of the second processors;

examining an identifier of the data to identify a data stream to which the data belongs;

assembling the data into a software cell;

examining a header of the software cell to determine whether the software cell contains a first data type, and if the software cell contains the first data type, examining the identifier includes identifying the data stream to which the software cell belongs;

wherein the identifier comprises a previous cell identifier relating to a group of software cells requiring sequential processing; and

using the selected second processor and the previous cell identifier to determine whether a previously processed software cell of the group was assigned to the particular second processor for processing.

7. The method of claim 6, further comprising the selected second processor assigning the software cell to a particular second processor for processing based on the identifier.

8. The method of claim 6, further comprising assigning the software cell to the particular second processor based on a load balancing factor.

9. The method of claim 6, further comprising issuing a command from the selected second processor to write at least a portion of the data of the software cell to a sandbox.

10. A method of processing computing tasks in a processing system, the processing system including a first processor of a first processor type and a plurality of second processors of a second processor type operatively connected to the first processor, the method comprising:

receiving data at a selected one of the second processors; and

examining an identifier of the data to identify a data stream to which the data belongs;

assembling the data into a software cell;

examining a header of the software cell to determine whether the software cell contains a first data type, and if the software cell contains the first data type, examining the identifier includes identifying the data stream to which the software cell belongs;

if the software cell does not contain the first data type, transferring the software cell from the selected second processor to a memory;

issuing a command from the selected second processor to write at least a portion of the data of the software cell to a sandbox;

reading the portion of the data of the software cell from the sandbox to a local memory of a chosen one of the second processors; and

processing the portion of the data in the local memory.

11. The method of claim 10, further comprising transferring the software cell to the sandbox.

12. The method of claim 11, wherein the sandbox is a general purpose sandbox.

13. The method of claim 10, further comprising reading the portion of the data of the software cell from the sandbox to a local memory of a chosen one of the second processors.

14. A method of processing computing tasks in a processing system, the processing system including a first processor of a first processor type and a plurality of second processors of a second processor type operatively connected to the first processor, the method comprising:

receiving data at a selected one of the second processors;

examining an identifier of the data to identify a data stream to which the data belongs;

assembling the data into a software cell;

examining a header of the software cell to determine whether the software cell contains a first data type, and if the software cell contains the first data type, examining the identifier includes identifying the data stream to which the software cell belongs;

issuing a command from the selected second processor to write at least a portion of the data of the software cell to a sandbox;

reading the portion of the data of the software cell from the sandbox to a local memory of a chosen one of the second processors;

processing the portion of the data in the local memory; and

generating video data from the processed data.

15. The method of claim 14, further comprising writing the video data to a second sandbox.

16. The method of claim 15, further comprising issuing a read command to the second sandbox to prepare the second sandbox to receive additional data.