Structure for handling data access

• US 8,032,713 B2
• Filed: 05/05/2008
• Issued: 10/04/2011
• Est. Priority Date: 12/10/2007
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Trombley, Michael R., Jenkins, Steven K., Allen, James J. Jr., Mossman, James A.
• Primary Examiner(s): KROFCHECK, MICHAEL C
• Application Number:
  US12/115,146
• Publication Number:
  US 20090150618A1
• Time in Patent Office: 1,247 Days
• Field of Search: None
• US Class Current: 711/137
• CPC Class Codes: G06F 12/0862 with prefetch

Abstract

A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure generally includes a computer system that includes a CPU, a storage device, circuitry for providing a speculative access threshold corresponding to a selected percentage of the total number of accesses to the storage device that can be speculatively issued, and circuitry for intermixing demand accesses and speculative accesses in accordance with the speculative access threshold.

Claims

1. A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design, the design structure comprising:

a computer system comprising

a CPU;

a storage device;

circuitry for providing a speculative access threshold corresponding to a selected percentage of a total number of accesses to the storage device that can be speculatively issued, wherein the speculative access threshold is determined by an equation which includes at least one of (i) a system access request rate and (ii) a percentage of access requests that do not have valid cached data available and require data from the storage device; and

circuitry for intermixing demand accesses and speculative accesses in accordance with the speculative access threshold.

2. The design structure of claim 1, further comprising:

circuitry for dispatching an incoming access request as a speculative access request if a percentage of current storage device resources being used for speculative accesses is less than the speculative access threshold; and

circuitry for preventing the incoming access request from dispatching as a speculative access request if a percentage of current storage device resources being used for speculative accesses is equal to or greater than the speculative access threshold.

3. The design structure of claim 2, further comprising circuitry for preventing the incoming access request from dispatching as a speculative access request if the storage device is incapable of accepting additional access requests.

4. The design structure of claim 1, wherein the speculative access threshold is based on the system access request rate.

5. The design structure of claim 1, wherein the speculative access threshold is based on the percentage of access requests that do not have valid cached data available and require data from the storage device.

6. The design structure of claim 1, further comprising a netlist that describes the computer system.

7. The design structure of claim 1, wherein the design structure resides on the machine readable storage medium as a data format used for an exchange of layout data of integrated circuits.

8. The design structure of claim 1, further comprising:

circuitry for monitoring a selected computer system state; and

circuitry for dynamically adjusting the speculative access threshold based on the selected computer system state.

9. A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design, the design structure comprising:

a computer system comprising

a CPU;

a storage device;

circuitry for providing a speculative access threshold corresponding to a selected percentage of a total number of accesses to the storage device that can be speculatively issued, wherein the speculative access threshold is determined by an equation which includes at least one of (i) a system access request rate and (ii) a percentage of access requests that do not have valid cached data available and require data from the storage device;

circuitry for intermixing demand accesses and speculative accesses in accordance with the speculative access threshold; and

circuitry for dispatching an incoming access request speculatively if current storage device bandwidth being used for speculative accesses is less than the speculative access threshold; and

circuitry for preventing the incoming access request from dispatching as a speculative access request if current storage device bandwidth being used for speculative accesses is equal to or greater than the speculative access threshold.

10. The design structure of claim 9, further comprising circuitry for preventing the incoming access request from dispatching as a speculative access request if the storage device is incapable of accepting additional access requests.

11. The design structure of claim 9, wherein the speculative access threshold is based on the system access request rate.

12. The design structure of claim 9, wherein the speculative access threshold is based on the percentage of access requests that do not have valid cached data available and require data from the storage device.

13. The design structure of claim 9, wherein the design structure further comprises a netlist that describes the computer system, and wherein the design structure resides on the machine readable storage medium as a data format used for an exchange of layout data of integrated circuits.

14. The design structure of claim 9, further comprising:

circuitry for monitoring a selected computer system state; and

circuitry for dynamically adjusting the speculative access threshold based on the selected computer system state.

15. A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design, the design structure comprising:

a computer system comprising

a CPU;

a storage device;

circuitry for providing a speculative access threshold corresponding to a selected percentage of a total number of accesses to the storage device that can be speculatively issued;

circuitry for determining the speculative access threshold by an equation which includes at least one of (i) a system access request rate and (ii) a percentage of access requests that do not have valid cached data available and require data from the storage device; and

circuitry for intermixing demand accesses and speculative accesses in accordance with the speculative access threshold.

16. The design structure of claim 15, further comprising:

circuitry for dispatching an incoming access request as a speculative access request if a percentage of current storage device resources being used for speculative accesses is less than the speculative access threshold; and

circuitry for preventing the incoming access request from dispatching as a speculative access request if a percentage of current storage device resources being used for speculative accesses is equal to or greater than the speculative access threshold.

17. The design structure of claim 16, further comprising circuitry for preventing the incoming access request from dispatching as a speculative access request if the storage device is incapable of accepting additional access requests.

18. The design structure of claim 15, further comprising a netlist that describes the computer system.

19. The design structure of claim 15, wherein the design structure resides on the machine readable storage medium as a data format used for an exchange of layout data of integrated circuits.

20. The design structure of claim 15, further comprising:

circuitry for monitoring a selected computer system state; and

circuitry for dynamically adjusting the speculative access threshold based on the selected computer system state.