Methods and systems for computer aided design of 3D integrated circuits
First Claim
1. A system for computer aided design of a 3-D integrated circuit, the system comprising:
- a computer having at least one processor;
a hierarchical cell data structure defined on said computer;
a 3-D hierarchical cell comprising a part of said hierarchical cell data structure and representing said 3-D integrated circuit; and
a graphical user interface in communication with said at least one processor, said graphical user interface configured to define said 3-D hierarchical cell, said graphical user interface having,a cell name input component configured to input a name for said 3-D hierarchical cell of said 3-D integrated circuit;
a technology selection component for said 3-D hierarchical cell;
a 3-D technology file referenced by said technology selection component and containing information relating to how said 3-D integrated circuit is to be constructed said 3-D technology file providing means to define rules for electrical or physical interaction between geometries for 3-D design layers on specific circuit levels;
a circuit level selection component configured to specify a 2-D fabrication technology for said 3-D integrated circuit; and
a child cell name input component for a child cell of said 3-D hierarchical cell.
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Abstract
Methods and systems for generating and verifying circuit layouts from computer-aided design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In one instance, a 3-D technology file of these teachings is obtained by providing an identifier for two or more circuit levels, providing for each one of the two or more circuit levels an identifier for a 2-D technology file corresponding to each of the one or more circuit levels and providing a file structure including the two or more circuit levels and each identifier, corresponding to each one of the one or more circuit levels, for the 2-D technology file corresponding to each one of the two or more circuit levels. Other embodiments are disclosed.
153 Citations
13 Claims
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1. A system for computer aided design of a 3-D integrated circuit, the system comprising:
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a computer having at least one processor; a hierarchical cell data structure defined on said computer; a 3-D hierarchical cell comprising a part of said hierarchical cell data structure and representing said 3-D integrated circuit; and a graphical user interface in communication with said at least one processor, said graphical user interface configured to define said 3-D hierarchical cell, said graphical user interface having, a cell name input component configured to input a name for said 3-D hierarchical cell of said 3-D integrated circuit; a technology selection component for said 3-D hierarchical cell; a 3-D technology file referenced by said technology selection component and containing information relating to how said 3-D integrated circuit is to be constructed said 3-D technology file providing means to define rules for electrical or physical interaction between geometries for 3-D design layers on specific circuit levels; a circuit level selection component configured to specify a 2-D fabrication technology for said 3-D integrated circuit; and a child cell name input component for a child cell of said 3-D hierarchical cell. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of designing a 3-D integrated circuit comprising:
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displaying an interactive menu on a graphical user interface; receiving a user input to define a 3-D hierarchical layout cell, said 3-D hierarchical layout cell comprising a 3-D child cell and a 2-D child cell; providing, on said interactive menu, a technology selection component for said 3-D hierarchical layout cell; referencing a 3-D technology file based on a selected technology said 3-D technology file providing means to define rules for electrical or physical interaction between geometries for 3-D design layers on specific circuit levels; instantiating said 2-D child cell within said 3-D hierarchical layout cell; providing, on said interactive menu, a circuit level selection component configured to specify a 2-D fabrication technology for said 3-D integrated circuit; projecting said 3-D child cell within said 2-D child cell; and saving said 3-D technology file containing assembly and fabrication information for said 3-D integrated circuit. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method for computer aided design of a 3-D integrated circuit, the system comprising:
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providing a computer having at least one processor; defining a hierarchical cell data structure on said computer; defining a 3-D hierarchical cell representing said 3-D integrated circuit; using a graphical user interface in communication with said at least one processor to define said 3-D hierarchical cell; providing a cell name via said graphical user interface to name said 3-D hierarchical cell of said 3-D integrated circuit; configuring, via said graphical user interface, a 3-D technology file containing information relating to how said 3-D integrated circuit is to be constructed said 3-D technology file providing means to define rules for electrical or physical interaction between geometries for 3-D design layers on specific circuit levels; specifying, via said graphical user interface, a 2-D fabrication technology for said 3-D integrated circuit; and providing a child cell name, via said graphical user interface, naming a child cell of said 3-D hierarchical cell.
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Specification